Home
last modified time | relevance | path

Searched refs:regDSCC3_DSCC_PPS_CONFIG12_BASE_IDX (Results 1 – 7 of 7) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h12988 #define regDSCC3_DSCC_PPS_CONFIG12_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h10927 #define regDSCC3_DSCC_PPS_CONFIG12_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h10906 #define regDSCC3_DSCC_PPS_CONFIG12_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h12092 #define regDSCC3_DSCC_PPS_CONFIG12_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h12029 #define regDSCC3_DSCC_PPS_CONFIG12_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h12102 #define regDSCC3_DSCC_PPS_CONFIG12_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h12354 #define regDSCC3_DSCC_PPS_CONFIG12_BASE_IDX … macro