Home
last modified time | relevance | path

Searched refs:regDSCC2_DSCC_RATE_BUFFER1_MAX_FULLNESS_LEVEL (Results 1 – 9 of 9) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h12897 #define regDSCC2_DSCC_RATE_BUFFER1_MAX_FULLNESS_LEVEL … macro
H A Ddcn_3_5_0_offset.h10836 #define regDSCC2_DSCC_RATE_BUFFER1_MAX_FULLNESS_LEVEL … macro
H A Ddcn_3_5_1_offset.h10815 #define regDSCC2_DSCC_RATE_BUFFER1_MAX_FULLNESS_LEVEL … macro
H A Ddcn_3_2_1_offset.h12022 #define regDSCC2_DSCC_RATE_BUFFER1_MAX_FULLNESS_LEVEL … macro
H A Ddcn_3_1_4_offset.h11938 #define regDSCC2_DSCC_RATE_BUFFER1_MAX_FULLNESS_LEVEL … macro
H A Ddcn_3_1_2_offset.h12813 #define regDSCC2_DSCC_RATE_BUFFER1_MAX_FULLNESS_LEVEL … macro
H A Ddcn_3_2_0_offset.h12025 #define regDSCC2_DSCC_RATE_BUFFER1_MAX_FULLNESS_LEVEL … macro
H A Ddcn_3_1_5_offset.h12678 #define regDSCC2_DSCC_RATE_BUFFER1_MAX_FULLNESS_LEVEL … macro
H A Ddcn_3_1_6_offset.h13409 #define regDSCC2_DSCC_RATE_BUFFER1_MAX_FULLNESS_LEVEL … macro