Home
last modified time | relevance | path

Searched refs:regDSCC2_DSCC_PPS_CONFIG0 (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h12831 #define regDSCC2_DSCC_PPS_CONFIG0 … macro
H A Ddcn_3_5_0_offset.h10770 #define regDSCC2_DSCC_PPS_CONFIG0 … macro
H A Ddcn_3_5_1_offset.h10749 #define regDSCC2_DSCC_PPS_CONFIG0 … macro
H A Ddcn_3_2_1_offset.h11956 #define regDSCC2_DSCC_PPS_CONFIG0 … macro
H A Ddcn_3_1_4_offset.h11872 #define regDSCC2_DSCC_PPS_CONFIG0 … macro
H A Ddcn_3_1_2_offset.h12747 #define regDSCC2_DSCC_PPS_CONFIG0 … macro
H A Ddcn_3_2_0_offset.h11959 #define regDSCC2_DSCC_PPS_CONFIG0 … macro
H A Ddcn_3_1_5_offset.h12612 #define regDSCC2_DSCC_PPS_CONFIG0 … macro
H A Ddcn_4_1_0_offset.h12185 #define regDSCC2_DSCC_PPS_CONFIG0 … macro
H A Ddcn_3_1_6_offset.h13343 #define regDSCC2_DSCC_PPS_CONFIG0 … macro