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Searched refs:regDSCC1_DSCC_PPS_CONFIG22_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h12744 #define regDSCC1_DSCC_PPS_CONFIG22_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h10683 #define regDSCC1_DSCC_PPS_CONFIG22_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h10662 #define regDSCC1_DSCC_PPS_CONFIG22_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h11889 #define regDSCC1_DSCC_PPS_CONFIG22_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h11785 #define regDSCC1_DSCC_PPS_CONFIG22_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h12660 #define regDSCC1_DSCC_PPS_CONFIG22_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h11886 #define regDSCC1_DSCC_PPS_CONFIG22_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h12525 #define regDSCC1_DSCC_PPS_CONFIG22_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h12086 #define regDSCC1_DSCC_PPS_CONFIG22_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h13256 #define regDSCC1_DSCC_PPS_CONFIG22_BASE_IDX … macro