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Searched refs:regDSCC1_DSCC_PPS_CONFIG17 (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h12733 #define regDSCC1_DSCC_PPS_CONFIG17 … macro
H A Ddcn_3_5_0_offset.h10672 #define regDSCC1_DSCC_PPS_CONFIG17 … macro
H A Ddcn_3_5_1_offset.h10651 #define regDSCC1_DSCC_PPS_CONFIG17 … macro
H A Ddcn_3_2_1_offset.h11878 #define regDSCC1_DSCC_PPS_CONFIG17 … macro
H A Ddcn_3_1_4_offset.h11774 #define regDSCC1_DSCC_PPS_CONFIG17 … macro
H A Ddcn_3_1_2_offset.h12649 #define regDSCC1_DSCC_PPS_CONFIG17 … macro
H A Ddcn_3_2_0_offset.h11875 #define regDSCC1_DSCC_PPS_CONFIG17 … macro
H A Ddcn_3_1_5_offset.h12514 #define regDSCC1_DSCC_PPS_CONFIG17 … macro
H A Ddcn_4_1_0_offset.h12075 #define regDSCC1_DSCC_PPS_CONFIG17 … macro
H A Ddcn_3_1_6_offset.h13245 #define regDSCC1_DSCC_PPS_CONFIG17 … macro