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Searched refs:regDSCC0_DSCC_PPS_CONFIG9_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h12587 #define regDSCC0_DSCC_PPS_CONFIG9_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h10526 #define regDSCC0_DSCC_PPS_CONFIG9_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h10505 #define regDSCC0_DSCC_PPS_CONFIG9_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h11751 #define regDSCC0_DSCC_PPS_CONFIG9_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h11627 #define regDSCC0_DSCC_PPS_CONFIG9_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h12502 #define regDSCC0_DSCC_PPS_CONFIG9_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h11742 #define regDSCC0_DSCC_PPS_CONFIG9_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h12367 #define regDSCC0_DSCC_PPS_CONFIG9_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h11916 #define regDSCC0_DSCC_PPS_CONFIG9_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h13098 #define regDSCC0_DSCC_PPS_CONFIG9_BASE_IDX … macro