Home
last modified time | relevance | path

Searched refs:regDSCC0_DSCC_PPS_CONFIG8_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h12585 #define regDSCC0_DSCC_PPS_CONFIG8_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h10524 #define regDSCC0_DSCC_PPS_CONFIG8_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h10503 #define regDSCC0_DSCC_PPS_CONFIG8_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h11749 #define regDSCC0_DSCC_PPS_CONFIG8_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h11625 #define regDSCC0_DSCC_PPS_CONFIG8_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h12500 #define regDSCC0_DSCC_PPS_CONFIG8_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h11740 #define regDSCC0_DSCC_PPS_CONFIG8_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h12365 #define regDSCC0_DSCC_PPS_CONFIG8_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h11914 #define regDSCC0_DSCC_PPS_CONFIG8_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h13096 #define regDSCC0_DSCC_PPS_CONFIG8_BASE_IDX … macro