Home
last modified time | relevance | path

Searched refs:regDSCC0_DSCC_PPS_CONFIG8 (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h12584 #define regDSCC0_DSCC_PPS_CONFIG8 … macro
H A Ddcn_3_5_0_offset.h10523 #define regDSCC0_DSCC_PPS_CONFIG8 … macro
H A Ddcn_3_5_1_offset.h10502 #define regDSCC0_DSCC_PPS_CONFIG8 … macro
H A Ddcn_3_2_1_offset.h11748 #define regDSCC0_DSCC_PPS_CONFIG8 … macro
H A Ddcn_3_1_4_offset.h11624 #define regDSCC0_DSCC_PPS_CONFIG8 … macro
H A Ddcn_3_1_2_offset.h12499 #define regDSCC0_DSCC_PPS_CONFIG8 … macro
H A Ddcn_3_2_0_offset.h11739 #define regDSCC0_DSCC_PPS_CONFIG8 … macro
H A Ddcn_3_1_5_offset.h12364 #define regDSCC0_DSCC_PPS_CONFIG8 … macro
H A Ddcn_4_1_0_offset.h11913 #define regDSCC0_DSCC_PPS_CONFIG8 … macro
H A Ddcn_3_1_6_offset.h13095 #define regDSCC0_DSCC_PPS_CONFIG8 … macro