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Searched refs:regDSCC0_DSCC_PPS_CONFIG5 (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h12578 #define regDSCC0_DSCC_PPS_CONFIG5 … macro
H A Ddcn_3_5_0_offset.h10517 #define regDSCC0_DSCC_PPS_CONFIG5 … macro
H A Ddcn_3_5_1_offset.h10496 #define regDSCC0_DSCC_PPS_CONFIG5 … macro
H A Ddcn_3_2_1_offset.h11742 #define regDSCC0_DSCC_PPS_CONFIG5 … macro
H A Ddcn_3_1_4_offset.h11618 #define regDSCC0_DSCC_PPS_CONFIG5 … macro
H A Ddcn_3_1_2_offset.h12493 #define regDSCC0_DSCC_PPS_CONFIG5 … macro
H A Ddcn_3_2_0_offset.h11733 #define regDSCC0_DSCC_PPS_CONFIG5 … macro
H A Ddcn_3_1_5_offset.h12358 #define regDSCC0_DSCC_PPS_CONFIG5 … macro
H A Ddcn_4_1_0_offset.h11907 #define regDSCC0_DSCC_PPS_CONFIG5 … macro
H A Ddcn_3_1_6_offset.h13089 #define regDSCC0_DSCC_PPS_CONFIG5 … macro