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Searched refs:regDSCC0_DSCC_PPS_CONFIG22 (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h12612 #define regDSCC0_DSCC_PPS_CONFIG22 … macro
H A Ddcn_3_5_0_offset.h10551 #define regDSCC0_DSCC_PPS_CONFIG22 … macro
H A Ddcn_3_5_1_offset.h10530 #define regDSCC0_DSCC_PPS_CONFIG22 … macro
H A Ddcn_3_2_1_offset.h11776 #define regDSCC0_DSCC_PPS_CONFIG22 … macro
H A Ddcn_3_1_4_offset.h11652 #define regDSCC0_DSCC_PPS_CONFIG22 … macro
H A Ddcn_3_1_2_offset.h12527 #define regDSCC0_DSCC_PPS_CONFIG22 … macro
H A Ddcn_3_2_0_offset.h11767 #define regDSCC0_DSCC_PPS_CONFIG22 … macro
H A Ddcn_3_1_5_offset.h12392 #define regDSCC0_DSCC_PPS_CONFIG22 … macro
H A Ddcn_4_1_0_offset.h11941 #define regDSCC0_DSCC_PPS_CONFIG22 … macro
H A Ddcn_3_1_6_offset.h13123 #define regDSCC0_DSCC_PPS_CONFIG22 … macro