Home
last modified time | relevance | path

Searched refs:regDSCC0_DSCC_PPS_CONFIG15 (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h12598 #define regDSCC0_DSCC_PPS_CONFIG15 … macro
H A Ddcn_3_5_0_offset.h10537 #define regDSCC0_DSCC_PPS_CONFIG15 … macro
H A Ddcn_3_5_1_offset.h10516 #define regDSCC0_DSCC_PPS_CONFIG15 … macro
H A Ddcn_3_2_1_offset.h11762 #define regDSCC0_DSCC_PPS_CONFIG15 … macro
H A Ddcn_3_1_4_offset.h11638 #define regDSCC0_DSCC_PPS_CONFIG15 … macro
H A Ddcn_3_1_2_offset.h12513 #define regDSCC0_DSCC_PPS_CONFIG15 … macro
H A Ddcn_3_2_0_offset.h11753 #define regDSCC0_DSCC_PPS_CONFIG15 … macro
H A Ddcn_3_1_5_offset.h12378 #define regDSCC0_DSCC_PPS_CONFIG15 … macro
H A Ddcn_4_1_0_offset.h11927 #define regDSCC0_DSCC_PPS_CONFIG15 … macro
H A Ddcn_3_1_6_offset.h13109 #define regDSCC0_DSCC_PPS_CONFIG15 … macro