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Searched refs:regDSCC0_DSCC_PPS_CONFIG12 (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h12592 #define regDSCC0_DSCC_PPS_CONFIG12 … macro
H A Ddcn_3_5_0_offset.h10531 #define regDSCC0_DSCC_PPS_CONFIG12 … macro
H A Ddcn_3_5_1_offset.h10510 #define regDSCC0_DSCC_PPS_CONFIG12 … macro
H A Ddcn_3_2_1_offset.h11756 #define regDSCC0_DSCC_PPS_CONFIG12 … macro
H A Ddcn_3_1_4_offset.h11632 #define regDSCC0_DSCC_PPS_CONFIG12 … macro
H A Ddcn_3_1_2_offset.h12507 #define regDSCC0_DSCC_PPS_CONFIG12 … macro
H A Ddcn_3_2_0_offset.h11747 #define regDSCC0_DSCC_PPS_CONFIG12 … macro
H A Ddcn_3_1_5_offset.h12372 #define regDSCC0_DSCC_PPS_CONFIG12 … macro
H A Ddcn_4_1_0_offset.h11921 #define regDSCC0_DSCC_PPS_CONFIG12 … macro
H A Ddcn_3_1_6_offset.h13103 #define regDSCC0_DSCC_PPS_CONFIG12 … macro