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Searched refs:regDP_SYM32_ENC2_DP_SYM32_ENC_SDP_GSP_CONTROL10 (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h13791 #define regDP_SYM32_ENC2_DP_SYM32_ENC_SDP_GSP_CONTROL10 … macro
H A Ddcn_3_5_0_offset.h11927 #define regDP_SYM32_ENC2_DP_SYM32_ENC_SDP_GSP_CONTROL10 … macro
H A Ddcn_3_5_1_offset.h11906 #define regDP_SYM32_ENC2_DP_SYM32_ENC_SDP_GSP_CONTROL10 … macro
H A Ddcn_3_2_1_offset.h12721 #define regDP_SYM32_ENC2_DP_SYM32_ENC_SDP_GSP_CONTROL10 … macro
H A Ddcn_3_1_4_offset.h13010 #define regDP_SYM32_ENC2_DP_SYM32_ENC_SDP_GSP_CONTROL10 … macro
H A Ddcn_3_1_2_offset.h13443 #define regDP_SYM32_ENC2_DP_SYM32_ENC_SDP_GSP_CONTROL10 … macro
H A Ddcn_3_2_0_offset.h12737 #define regDP_SYM32_ENC2_DP_SYM32_ENC_SDP_GSP_CONTROL10 … macro
H A Ddcn_3_1_5_offset.h13306 #define regDP_SYM32_ENC2_DP_SYM32_ENC_SDP_GSP_CONTROL10 … macro
H A Ddcn_4_1_0_offset.h13494 #define regDP_SYM32_ENC2_DP_SYM32_ENC_SDP_GSP_CONTROL10 … macro
H A Ddcn_3_1_6_offset.h14039 #define regDP_SYM32_ENC2_DP_SYM32_ENC_SDP_GSP_CONTROL10 … macro