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Searched refs:regDP3_DP_DPHY_HBR2_PATTERN_CONTROL (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h10602 #define regDP3_DP_DPHY_HBR2_PATTERN_CONTROL … macro
H A Ddcn_3_5_0_offset.h9323 #define regDP3_DP_DPHY_HBR2_PATTERN_CONTROL … macro
H A Ddcn_3_5_1_offset.h9302 #define regDP3_DP_DPHY_HBR2_PATTERN_CONTROL … macro
H A Ddcn_3_2_1_offset.h9782 #define regDP3_DP_DPHY_HBR2_PATTERN_CONTROL … macro
H A Ddcn_3_1_4_offset.h10460 #define regDP3_DP_DPHY_HBR2_PATTERN_CONTROL … macro
H A Ddcn_3_1_2_offset.h10629 #define regDP3_DP_DPHY_HBR2_PATTERN_CONTROL … macro
H A Ddcn_3_2_0_offset.h9783 #define regDP3_DP_DPHY_HBR2_PATTERN_CONTROL … macro
H A Ddcn_3_1_5_offset.h10384 #define regDP3_DP_DPHY_HBR2_PATTERN_CONTROL … macro
H A Ddcn_4_1_0_offset.h10526 #define regDP3_DP_DPHY_HBR2_PATTERN_CONTROL … macro
H A Ddcn_3_1_6_offset.h10853 #define regDP3_DP_DPHY_HBR2_PATTERN_CONTROL … macro