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Searched refs:regDIG4_TMDS_DCBALANCER_CONTROL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h11079 #define regDIG4_TMDS_DCBALANCER_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h9578 #define regDIG4_TMDS_DCBALANCER_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h9557 #define regDIG4_TMDS_DCBALANCER_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h10225 #define regDIG4_TMDS_DCBALANCER_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h10697 #define regDIG4_TMDS_DCBALANCER_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h11048 #define regDIG4_TMDS_DCBALANCER_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h10226 #define regDIG4_TMDS_DCBALANCER_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h10803 #define regDIG4_TMDS_DCBALANCER_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h11272 #define regDIG4_TMDS_DCBALANCER_CONTROL_BASE_IDX … macro