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Searched refs:regDIG1_TMDS_DCBALANCER_CONTROL (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h10184 #define regDIG1_TMDS_DCBALANCER_CONTROL macro
H A Ddcn_3_5_0_offset.h8467 #define regDIG1_TMDS_DCBALANCER_CONTROL macro
H A Ddcn_3_5_1_offset.h8446 #define regDIG1_TMDS_DCBALANCER_CONTROL macro
H A Ddcn_3_2_1_offset.h9384 #define regDIG1_TMDS_DCBALANCER_CONTROL macro
H A Ddcn_3_1_4_offset.h9634 #define regDIG1_TMDS_DCBALANCER_CONTROL macro
H A Ddcn_3_1_2_offset.h10243 #define regDIG1_TMDS_DCBALANCER_CONTROL macro
H A Ddcn_3_2_0_offset.h9385 #define regDIG1_TMDS_DCBALANCER_CONTROL macro
H A Ddcn_3_1_5_offset.h9998 #define regDIG1_TMDS_DCBALANCER_CONTROL macro
H A Ddcn_4_1_0_offset.h10098 #define regDIG1_TMDS_DCBALANCER_CONTROL macro
H A Ddcn_3_1_6_offset.h10467 #define regDIG1_TMDS_DCBALANCER_CONTROL macro