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Searched refs:regDCIO_BL_PWM_FRAME_START_DISP_SEL_BASE_IDX (Results 1 – 14 of 14) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6261 #define regDCIO_BL_PWM_FRAME_START_DISP_SEL_BASE_IDX … macro
H A Ddpcs_4_2_0_offset.h601 #define regDCIO_BL_PWM_FRAME_START_DISP_SEL_BASE_IDX … macro
H A Ddpcs_4_2_2_offset.h598 #define regDCIO_BL_PWM_FRAME_START_DISP_SEL_BASE_IDX … macro
H A Ddpcs_4_2_3_offset.h634 #define regDCIO_BL_PWM_FRAME_START_DISP_SEL_BASE_IDX … macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h11889 #define regDCIO_BL_PWM_FRAME_START_DISP_SEL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h9808 #define regDCIO_BL_PWM_FRAME_START_DISP_SEL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h9787 #define regDCIO_BL_PWM_FRAME_START_DISP_SEL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h10969 #define regDCIO_BL_PWM_FRAME_START_DISP_SEL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h10919 #define regDCIO_BL_PWM_FRAME_START_DISP_SEL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h11810 #define regDCIO_BL_PWM_FRAME_START_DISP_SEL_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h10960 #define regDCIO_BL_PWM_FRAME_START_DISP_SEL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h11555 #define regDCIO_BL_PWM_FRAME_START_DISP_SEL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h11222 #define regDCIO_BL_PWM_FRAME_START_DISP_SEL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h12046 #define regDCIO_BL_PWM_FRAME_START_DISP_SEL_BASE_IDX … macro