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Searched refs:regDCCG_VSYNC_OTG2_LATCH_VALUE (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h336 #define regDCCG_VSYNC_OTG2_LATCH_VALUE … macro
H A Ddcn_3_5_0_offset.h1346 #define regDCCG_VSYNC_OTG2_LATCH_VALUE … macro
H A Ddcn_3_5_1_offset.h1325 #define regDCCG_VSYNC_OTG2_LATCH_VALUE … macro
H A Ddcn_3_2_1_offset.h188 #define regDCCG_VSYNC_OTG2_LATCH_VALUE … macro
H A Ddcn_3_1_4_offset.h1487 #define regDCCG_VSYNC_OTG2_LATCH_VALUE … macro
H A Ddcn_3_1_2_offset.h395 #define regDCCG_VSYNC_OTG2_LATCH_VALUE … macro
H A Ddcn_3_2_0_offset.h188 #define regDCCG_VSYNC_OTG2_LATCH_VALUE … macro
H A Ddcn_3_1_5_offset.h182 #define regDCCG_VSYNC_OTG2_LATCH_VALUE … macro
H A Ddcn_4_1_0_offset.h210 #define regDCCG_VSYNC_OTG2_LATCH_VALUE … macro
H A Ddcn_3_1_6_offset.h595 #define regDCCG_VSYNC_OTG2_LATCH_VALUE … macro