Searched refs:regDAGB0_CNTL_MISC2 (Results 1 – 10 of 10) sorted by relevance
| /linux-6.15/drivers/gpu/drm/amd/amdgpu/ |
| H A D | mmhub_v4_1_0.c | 555 def1 = data1 = RREG32_SOC15(MMHUB, 0, regDAGB0_CNTL_MISC2); in mmhub_v4_1_0_update_medium_grain_clock_gating()
583 WREG32_SOC15(MMHUB, 0, regDAGB0_CNTL_MISC2, data1); in mmhub_v4_1_0_update_medium_grain_clock_gating()
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| H A D | mmhub_v3_0.c | 552 def1 = data1 = RREG32_SOC15(MMHUB, 0, regDAGB0_CNTL_MISC2); in mmhub_v3_0_update_medium_grain_clock_gating()
596 WREG32_SOC15(MMHUB, 0, regDAGB0_CNTL_MISC2, data1); in mmhub_v3_0_update_medium_grain_clock_gating()
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| H A D | mmhub_v1_7.c | 488 def1 = data1 = RREG32_SOC15(MMHUB, 0, regDAGB0_CNTL_MISC2); in mmhub_v1_7_update_medium_grain_clock_gating()
529 WREG32_SOC15(MMHUB, 0, regDAGB0_CNTL_MISC2, data1); in mmhub_v1_7_update_medium_grain_clock_gating()
579 data1 = RREG32_SOC15(MMHUB, 0, regDAGB0_CNTL_MISC2); in mmhub_v1_7_get_clockgating()
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| /linux-6.15/drivers/gpu/drm/amd/include/asic_reg/mmhub/ |
| H A D | mmhub_3_3_0_offset.h | 332 #define regDAGB0_CNTL_MISC2 … macro
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| H A D | mmhub_4_1_0_offset.h | 278 #define regDAGB0_CNTL_MISC2 … macro
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| H A D | mmhub_3_0_0_offset.h | 296 #define regDAGB0_CNTL_MISC2 … macro
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| H A D | mmhub_3_0_2_offset.h | 296 #define regDAGB0_CNTL_MISC2 … macro
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| H A D | mmhub_3_0_1_offset.h | 320 #define regDAGB0_CNTL_MISC2 … macro
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| H A D | mmhub_1_8_0_offset.h | 250 #define regDAGB0_CNTL_MISC2 … macro
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| H A D | mmhub_1_7_offset.h | 242 #define regDAGB0_CNTL_MISC2 … macro
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