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Searched refs:regCP_PFP_PRGRM_CNTR_START_HI (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v11_0.c2600 WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START_HI, in gfx_v11_0_config_pfp_cache_rs64()
2885 WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START_HI, in gfx_v11_0_config_gfx_rs64()
3211 WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START_HI, in gfx_v11_0_cp_gfx_load_pfp_microcode_rs64()
H A Dgfx_v12_0.c2048 WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START_HI, in gfx_v12_0_config_gfx_rs64()
2126 WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START_HI, in gfx_v12_0_set_pfp_ucode_start_addr()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h3301 #define regCP_PFP_PRGRM_CNTR_START_HI … macro
H A Dgc_12_0_0_offset.h3612 #define regCP_PFP_PRGRM_CNTR_START_HI … macro
H A Dgc_11_0_0_offset.h4328 #define regCP_PFP_PRGRM_CNTR_START_HI … macro
H A Dgc_11_0_3_offset.h4552 #define regCP_PFP_PRGRM_CNTR_START_HI … macro