Searched refs:regCP_HQD_PQ_BASE (Results 1 – 12 of 12) sorted by relevance
| /linux-6.15/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_amdkfd_gfx_v11.c | 462 if (low == RREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_BASE)) && in hqd_is_occupied_v11()
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| H A D | mes_v11_0.c | 1214 WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE, mqd->cp_hqd_pq_base_lo); in mes_v11_0_queue_init_register()
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| H A D | mes_v12_0.c | 1305 WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE, mqd->cp_hqd_pq_base_lo); in mes_v12_0_queue_init_register()
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| H A D | gfx_v9_4_3.c | 126 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_BASE), 1960 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_BASE, in gfx_v9_4_3_xcc_kiq_init_register()
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| H A D | gfx_v12_0.c | 156 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_BASE), 3204 WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE, in gfx_v12_0_kiq_init_register()
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| H A D | gfx_v11_0.c | 200 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_BASE), 4318 WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE, in gfx_v11_0_kiq_init_register()
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| /linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_4_2_offset.h | 709 #define regCP_HQD_PQ_BASE … macro
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| H A D | gc_9_4_3_offset.h | 3298 #define regCP_HQD_PQ_BASE … macro
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| H A D | gc_11_5_0_offset.h | 3589 #define regCP_HQD_PQ_BASE … macro
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| H A D | gc_12_0_0_offset.h | 3858 #define regCP_HQD_PQ_BASE … macro
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| H A D | gc_11_0_0_offset.h | 4616 #define regCP_HQD_PQ_BASE … macro
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| H A D | gc_11_0_3_offset.h | 4840 #define regCP_HQD_PQ_BASE … macro
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