Home
last modified time | relevance | path

Searched refs:regCP_GFX_HQD_QUE_MGR_CONTROL (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h3415 #define regCP_GFX_HQD_QUE_MGR_CONTROL … macro
H A Dgc_12_0_0_offset.h3722 #define regCP_GFX_HQD_QUE_MGR_CONTROL … macro
H A Dgc_11_0_0_offset.h4442 #define regCP_GFX_HQD_QUE_MGR_CONTROL … macro
H A Dgc_11_0_3_offset.h4666 #define regCP_GFX_HQD_QUE_MGR_CONTROL … macro
/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v12_0.c207 SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_QUE_MGR_CONTROL),
H A Dgfx_v11_0.c251 SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_QUE_MGR_CONTROL),