Searched refs:regCP_CPC_IC_BASE_LO (Results 1 – 9 of 9) sorted by relevance
| /linux-6.15/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v11_0.c | 2529 WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_LO, in gfx_v11_0_config_mec_cache()
2817 WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_LO, addr); in gfx_v11_0_config_mec_cache_rs64()
3911 WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_LO, adev->gfx.mec.mec_fw_gpu_addr); in gfx_v11_0_cp_compute_load_microcode_rs64()
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| H A D | gfx_v9_4_3.c | 1729 WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_IC_BASE_LO, in gfx_v9_4_3_xcc_cp_compute_load_microcode()
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| H A D | gfx_v12_0.c | 2810 WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_LO, in gfx_v12_0_cp_compute_load_microcode_rs64()
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| /linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_4_2_offset.h | 581 #define regCP_CPC_IC_BASE_LO … macro
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| H A D | gc_9_4_3_offset.h | 3042 #define regCP_CPC_IC_BASE_LO … macro
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| H A D | gc_11_5_0_offset.h | 8407 #define regCP_CPC_IC_BASE_LO … macro
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| H A D | gc_12_0_0_offset.h | 6212 #define regCP_CPC_IC_BASE_LO … macro
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| H A D | gc_11_0_0_offset.h | 9736 #define regCP_CPC_IC_BASE_LO … macro
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| H A D | gc_11_0_3_offset.h | 10286 #define regCP_CPC_IC_BASE_LO … macro
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