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Searched refs:regCNVC_CFG2_PRE_CSC_C31_C32 (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h4408 #define regCNVC_CFG2_PRE_CSC_C31_C32 … macro
H A Ddcn_3_5_0_offset.h5303 #define regCNVC_CFG2_PRE_CSC_C31_C32 … macro
H A Ddcn_3_5_1_offset.h5282 #define regCNVC_CFG2_PRE_CSC_C31_C32 … macro
H A Ddcn_3_2_1_offset.h4034 #define regCNVC_CFG2_PRE_CSC_C31_C32 … macro
H A Ddcn_3_1_4_offset.h6022 #define regCNVC_CFG2_PRE_CSC_C31_C32 … macro
H A Ddcn_3_1_2_offset.h5113 #define regCNVC_CFG2_PRE_CSC_C31_C32 … macro
H A Ddcn_3_2_0_offset.h4035 #define regCNVC_CFG2_PRE_CSC_C31_C32 … macro
H A Ddcn_3_1_5_offset.h4872 #define regCNVC_CFG2_PRE_CSC_C31_C32 … macro
H A Ddcn_4_1_0_offset.h4319 #define regCNVC_CFG2_PRE_CSC_C31_C32 … macro
H A Ddcn_3_1_6_offset.h5333 #define regCNVC_CFG2_PRE_CSC_C31_C32 … macro