Home
last modified time | relevance | path

Searched refs:regCM2_CM_MEM_PWR_CTRL_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h4727 #define regCM2_CM_MEM_PWR_CTRL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h5622 #define regCM2_CM_MEM_PWR_CTRL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h5601 #define regCM2_CM_MEM_PWR_CTRL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h4353 #define regCM2_CM_MEM_PWR_CTRL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h6489 #define regCM2_CM_MEM_PWR_CTRL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h5580 #define regCM2_CM_MEM_PWR_CTRL_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h4354 #define regCM2_CM_MEM_PWR_CTRL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h5339 #define regCM2_CM_MEM_PWR_CTRL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h4758 #define regCM2_CM_MEM_PWR_CTRL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h5800 #define regCM2_CM_MEM_PWR_CTRL_BASE_IDX … macro