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Searched refs:regCM1_CM_GAMCOR_RAMA_OFFSET_B (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h4198 #define regCM1_CM_GAMCOR_RAMA_OFFSET_B … macro
H A Ddcn_3_5_0_offset.h5097 #define regCM1_CM_GAMCOR_RAMA_OFFSET_B … macro
H A Ddcn_3_5_1_offset.h5076 #define regCM1_CM_GAMCOR_RAMA_OFFSET_B … macro
H A Ddcn_3_2_1_offset.h3850 #define regCM1_CM_GAMCOR_RAMA_OFFSET_B … macro
H A Ddcn_3_1_4_offset.h5536 #define regCM1_CM_GAMCOR_RAMA_OFFSET_B … macro
H A Ddcn_3_1_2_offset.h4627 #define regCM1_CM_GAMCOR_RAMA_OFFSET_B … macro
H A Ddcn_3_2_0_offset.h3851 #define regCM1_CM_GAMCOR_RAMA_OFFSET_B … macro
H A Ddcn_3_1_5_offset.h4386 #define regCM1_CM_GAMCOR_RAMA_OFFSET_B … macro
H A Ddcn_4_1_0_offset.h4135 #define regCM1_CM_GAMCOR_RAMA_OFFSET_B … macro
H A Ddcn_3_1_6_offset.h4847 #define regCM1_CM_GAMCOR_RAMA_OFFSET_B … macro