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Searched refs:regCM1_CM_CONTROL_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h4103 #define regCM1_CM_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h5002 #define regCM1_CM_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h4981 #define regCM1_CM_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h3755 #define regCM1_CM_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h5441 #define regCM1_CM_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h4532 #define regCM1_CM_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h3756 #define regCM1_CM_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h4291 #define regCM1_CM_CONTROL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h4066 #define regCM1_CM_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h4752 #define regCM1_CM_CONTROL_BASE_IDX … macro