Home
last modified time | relevance | path

Searched refs:regCM0_CM_MEM_PWR_STATUS2 (Results 1 – 4 of 4) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_4_offset.h5224 #define regCM0_CM_MEM_PWR_STATUS2 … macro
H A Ddcn_3_1_2_offset.h4315 #define regCM0_CM_MEM_PWR_STATUS2 … macro
H A Ddcn_3_1_5_offset.h4074 #define regCM0_CM_MEM_PWR_STATUS2 … macro
H A Ddcn_3_1_6_offset.h4535 #define regCM0_CM_MEM_PWR_STATUS2 … macro