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Searched refs:regBIF_CFG_DEV0_EPF0_0_MAX_LATENCY_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_11_0_offset.h1219 #define regBIF_CFG_DEV0_EPF0_0_MAX_LATENCY_BASE_IDX … macro
H A Dnbio_7_9_0_offset.h1870 #define regBIF_CFG_DEV0_EPF0_0_MAX_LATENCY_BASE_IDX 8 macro
H A Dnbio_7_7_0_offset.h7117 #define regBIF_CFG_DEV0_EPF0_0_MAX_LATENCY_BASE_IDX … macro
H A Dnbio_7_2_0_offset.h7921 #define regBIF_CFG_DEV0_EPF0_0_MAX_LATENCY_BASE_IDX … macro