Home
last modified time | relevance | path

Searched refs:regBIF_BX0_INTERRUPT_CNTL2 (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dnbio_v7_2.c215 WREG32_SOC15(NBIO, 0, regBIF_BX0_INTERRUPT_CNTL2, in nbio_v7_2_ih_control()
H A Dnbif_v6_3_1.c225 WREG32_SOC15(NBIO, 0, regBIF_BX0_INTERRUPT_CNTL2, adev->dummy_page_addr >> 8); in nbif_v6_3_1_ih_control()
H A Dnbio_v4_3.c221 WREG32_SOC15(NBIO, 0, regBIF_BX0_INTERRUPT_CNTL2, adev->dummy_page_addr >> 8); in nbio_v4_3_ih_control()
H A Dnbio_v7_9.c326 WREG32_SOC15(NBIO, 0, regBIF_BX0_INTERRUPT_CNTL2, adev->dummy_page_addr >> 8); in nbio_v7_9_ih_control()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_11_0_offset.h8324 #define regBIF_BX0_INTERRUPT_CNTL2 macro
H A Dnbio_7_9_0_offset.h372 #define regBIF_BX0_INTERRUPT_CNTL2 macro
H A Dnbio_4_3_0_offset.h372 #define regBIF_BX0_INTERRUPT_CNTL2 macro
H A Dnbio_7_7_0_offset.h3790 #define regBIF_BX0_INTERRUPT_CNTL2 macro
H A Dnbio_7_2_0_offset.h4464 #define regBIF_BX0_INTERRUPT_CNTL2 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_3_1_offset.h1467 #define regBIF_BX0_INTERRUPT_CNTL2 macro