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Searched refs:regAFMT3_AFMT_MEM_PWR_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h11263 #define regAFMT3_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h9094 #define regAFMT3_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h9073 #define regAFMT3_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h10403 #define regAFMT3_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h10235 #define regAFMT3_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h11226 #define regAFMT3_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h10404 #define regAFMT3_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h10973 #define regAFMT3_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h10900 #define regAFMT3_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h11450 #define regAFMT3_AFMT_MEM_PWR_BASE_IDX … macro