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Searched refs:regAFMT2_AFMT_MEM_PWR_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h11219 #define regAFMT2_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h8724 #define regAFMT2_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h8703 #define regAFMT2_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h10361 #define regAFMT2_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h9881 #define regAFMT2_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h11184 #define regAFMT2_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h10362 #define regAFMT2_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h10933 #define regAFMT2_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h10854 #define regAFMT2_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h11408 #define regAFMT2_AFMT_MEM_PWR_BASE_IDX … macro