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Searched refs:regAFMT0_AFMT_MEM_PWR (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h11130 #define regAFMT0_AFMT_MEM_PWR … macro
H A Ddcn_3_5_0_offset.h7982 #define regAFMT0_AFMT_MEM_PWR … macro
H A Ddcn_3_5_1_offset.h7961 #define regAFMT0_AFMT_MEM_PWR … macro
H A Ddcn_3_2_1_offset.h10276 #define regAFMT0_AFMT_MEM_PWR … macro
H A Ddcn_3_1_4_offset.h9172 #define regAFMT0_AFMT_MEM_PWR … macro
H A Ddcn_3_1_2_offset.h11099 #define regAFMT0_AFMT_MEM_PWR … macro
H A Ddcn_3_2_0_offset.h10277 #define regAFMT0_AFMT_MEM_PWR … macro
H A Ddcn_3_1_5_offset.h10852 #define regAFMT0_AFMT_MEM_PWR … macro
H A Ddcn_4_1_0_offset.h10761 #define regAFMT0_AFMT_MEM_PWR … macro
H A Ddcn_3_1_6_offset.h11323 #define regAFMT0_AFMT_MEM_PWR … macro