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Searched refs:regABM2_BL1_PWM_ABM_CNTL (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h7682 #define regABM2_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_5_0_offset.h13615 #define regABM2_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_5_1_offset.h13594 #define regABM2_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_2_1_offset.h7230 #define regABM2_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_1_4_offset.h14942 #define regABM2_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_1_2_offset.h8065 #define regABM2_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_2_0_offset.h7231 #define regABM2_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_1_5_offset.h7828 #define regABM2_BL1_PWM_ABM_CNTL … macro
H A Ddcn_4_1_0_offset.h7929 #define regABM2_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_1_6_offset.h8289 #define regABM2_BL1_PWM_ABM_CNTL … macro