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Searched refs:regABM0_DC_ABM1_BL_MASTER_LOCK_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h7541 #define regABM0_DC_ABM1_BL_MASTER_LOCK_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h13474 #define regABM0_DC_ABM1_BL_MASTER_LOCK_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h13453 #define regABM0_DC_ABM1_BL_MASTER_LOCK_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h7089 #define regABM0_DC_ABM1_BL_MASTER_LOCK_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h14801 #define regABM0_DC_ABM1_BL_MASTER_LOCK_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h7924 #define regABM0_DC_ABM1_BL_MASTER_LOCK_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h7090 #define regABM0_DC_ABM1_BL_MASTER_LOCK_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h7687 #define regABM0_DC_ABM1_BL_MASTER_LOCK_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h7830 #define regABM0_DC_ABM1_BL_MASTER_LOCK_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h8148 #define regABM0_DC_ABM1_BL_MASTER_LOCK_BASE_IDX … macro