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Searched refs:regABM0_BL1_PWM_GRP2_REG_LOCK_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h7439 #define regABM0_BL1_PWM_GRP2_REG_LOCK_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h13372 #define regABM0_BL1_PWM_GRP2_REG_LOCK_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h13351 #define regABM0_BL1_PWM_GRP2_REG_LOCK_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h6987 #define regABM0_BL1_PWM_GRP2_REG_LOCK_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h14699 #define regABM0_BL1_PWM_GRP2_REG_LOCK_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h7822 #define regABM0_BL1_PWM_GRP2_REG_LOCK_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h6988 #define regABM0_BL1_PWM_GRP2_REG_LOCK_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h7585 #define regABM0_BL1_PWM_GRP2_REG_LOCK_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h7770 #define regABM0_BL1_PWM_GRP2_REG_LOCK_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h8046 #define regABM0_BL1_PWM_GRP2_REG_LOCK_BASE_IDX … macro