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/linux-6.15/arch/arm/boot/dts/st/
H A Dstm32h743.dtsi77 clocks = <&rcc TIM5_CK>;
114 clocks = <&rcc SPI2_CK>;
126 clocks = <&rcc SPI3_CK>;
162 clocks = <&rcc I2C1_CK>;
174 clocks = <&rcc I2C2_CK>;
186 clocks = <&rcc I2C3_CK>;
229 clocks = <&rcc SPI1_CK>;
240 clocks = <&rcc SPI4_CK>;
525 clocks = <&rcc RTCAPB_CK>, <&rcc RTC_CK>;
536 compatible = "st,stm32h743-rcc", "st,stm32-rcc";
[all …]
H A Dstm32f746.dtsi251 clocks = <&rcc 1 CLK_RTC>;
300 clocks = <&rcc 1 CLK_UART4>;
318 clocks = <&rcc 1 CLK_I2C1>;
330 clocks = <&rcc 1 CLK_I2C2>;
342 clocks = <&rcc 1 CLK_I2C3>;
354 clocks = <&rcc 1 CLK_I2C4>;
394 clocks = <&rcc 0 STM32F7_APB1_CLOCK(CEC)>, <&rcc 1 CLK_HDMI_CEC>;
606 clocks = <&rcc 1 CLK_LCD>;
623 rcc: rcc@40023800 { label
626 compatible = "st,stm32f746-rcc", "st,stm32-rcc";
[all …]
H A Dstm32f429.dtsi50 #include <dt-bindings/mfd/stm32f4-rcc.h>
269 clocks = <&rcc 1 CLK_RTC>;
270 assigned-clocks = <&rcc 1 CLK_RTC>;
346 resets = <&rcc STM32F4_APB1_RESET(I2C1)>;
398 resets = <&rcc STM32F4_APB1_RESET(DAC)>;
676 clocks = <&rcc 1 CLK_LCD>;
688 rcc: rcc@40023800 { label
691 compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
695 assigned-clocks = <&rcc 1 CLK_HSE_RTC>;
769 clocks = <&rcc 0 39>;
[all …]
H A Dstm32mp151.dtsi135 clocks = <&rcc IPCC>;
140 rcc: rcc@50000000 { label
277 clocks = <&rcc MDMA>;
356 clocks = <&rcc IWDG2>, <&rcc CK_LSI>;
389 clocks = <&rcc RTCAPB>, <&rcc RTC>;
931 clocks = <&rcc CEC_K>, <&rcc CEC>;
1466 clocks = <&rcc ADC12>, <&rcc ADC12_K>;
1776 <&rcc ETHTX>,
1777 <&rcc ETHRX>,
1778 <&rcc ETHCK_K>,
[all …]
H A Dstm32mp131.dtsi142 clocks = <&rcc TIM2_K>;
177 clocks = <&rcc TIM3_K>;
213 clocks = <&rcc TIM4_K>;
747 clocks = <&rcc DMA1>;
783 rcc: rcc@50000000 { label
951 clocks = <&rcc DTS>;
1047 clocks = <&rcc ADC2>, <&rcc ADC2_K>;
1602 <&rcc ETH1TX>,
1603 <&rcc ETH1RX>,
1604 <&rcc ETH1STP>,
[all …]
H A Dstm32mp157.dtsi15 clocks = <&rcc GPU>, <&rcc GPU_K>;
17 resets = <&rcc GPU_R>;
23 clocks = <&rcc DSI>, <&clk_hse>, <&rcc DSI_PX>;
26 resets = <&rcc DSI_R>;
H A Dstm32mp133.dtsi18 clocks = <&scmi_clk CK_SCMI_HSE>, <&rcc FDCAN_K>;
31 clocks = <&scmi_clk CK_SCMI_HSE>, <&rcc FDCAN_K>;
44 clocks = <&rcc ADC1>, <&rcc ADC1_K>;
83 clocks = <&rcc ETH2MAC>,
84 <&rcc ETH2TX>,
85 <&rcc ETH2RX>,
86 <&rcc ETH2STP>,
87 <&rcc ETH2CK_K>;
H A Dstm32f769.dtsi15 resets = <&rcc STM32F7_APB1_RESET(CAN3)>;
16 clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>;
24 clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>;
30 clocks = <&rcc 1 CLK_F769_DSI>, <&clk_hse>;
32 resets = <&rcc STM32F7_APB2_RESET(DSI)>;
H A Dstm32mp157c-ev1-scmi.dts39 clocks = <&rcc DSI>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
57 clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
61 clocks = <&scmi_clk CK_SCMI_HSE>, <&rcc FDCAN_K>;
80 &rcc {
81 compatible = "st,stm32mp1-rcc-secure", "syscon";
H A Dstm32mp157a-dk1-scmi.dts33 clocks = <&rcc DSI>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
51 clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
70 &rcc {
71 compatible = "st,stm32mp1-rcc-secure", "syscon";
H A Dstm32mp157c-dk2-scmi.dts39 clocks = <&rcc DSI>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
57 clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
76 &rcc {
77 compatible = "st,stm32mp1-rcc-secure", "syscon";
H A Dstm32mp157c-ed1-scmi.dts38 clocks = <&rcc DSI>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
56 clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
75 &rcc {
76 compatible = "st,stm32mp1-rcc-secure", "syscon";
H A Dstm32mp153.dtsi41 clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
55 clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
/linux-6.15/arch/arm64/boot/dts/st/
H A Dstm32mp251.dtsi245 clocks = <&rcc CK_BUS_SPI2>, <&rcc CK_KER_SPI2>;
247 resets = <&rcc SPI2_R>;
275 clocks = <&rcc CK_BUS_SPI3>, <&rcc CK_KER_SPI3>;
491 clocks = <&rcc CK_BUS_SPI1>, <&rcc CK_KER_SPI1>;
806 clocks = <&rcc CK_KER_CSI>, <&rcc CK_KER_CSITXESC>,
818 clocks = <&rcc CK_BUS_DCMIPP>, <&rcc CK_KER_CSI>;
828 clocks = <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>;
867 <&rcc CK_ETH1_TX>,
868 <&rcc CK_ETH1_RX>,
870 <&rcc CK_ETH1_STP>,
[all …]
H A Dstm32mp231.dtsi232 clocks = <&rcc CK_BUS_SPI2>, <&rcc CK_KER_SPI2>;
234 resets = <&rcc SPI2_R>;
249 resets = <&rcc SPI2_R>;
262 clocks = <&rcc CK_BUS_SPI3>, <&rcc CK_KER_SPI3>;
414 clocks = <&rcc CK_BUS_SPI1>, <&rcc CK_KER_SPI1>;
675 clocks = <&rcc CK_KER_CSI>, <&rcc CK_KER_CSITXESC>,
687 clocks = <&rcc CK_BUS_DCMIPP>, <&rcc CK_KER_CSI>;
721 <&rcc CK_ETH1_TX>,
722 <&rcc CK_ETH1_RX>,
724 <&rcc CK_ETH1_STP>,
[all …]
H A Dstm32mp233.dtsi58 clocks = <&rcc CK_ETH2_MAC>,
59 <&rcc CK_ETH2_TX>,
60 <&rcc CK_ETH2_RX>,
61 <&rcc CK_KER_ETH2PTP>,
62 <&rcc CK_ETH2_STP>,
63 <&rcc CK_KER_ETH2>;
H A Dstm32mp253.dtsi58 clocks = <&rcc CK_ETH2_MAC>,
59 <&rcc CK_ETH2_TX>,
60 <&rcc CK_ETH2_RX>,
61 <&rcc CK_KER_ETH2PTP>,
62 <&rcc CK_ETH2_STP>,
63 <&rcc CK_KER_ETH2>;
/linux-6.15/Documentation/devicetree/bindings/clock/
H A Dst,stm32-rcc.yaml22 - st,stm32f42xx-rcc
23 - st,stm32f746-rcc
24 - st,stm32h743-rcc
25 - const: st,stm32-rcc
28 - st,stm32f469-rcc
30 - const: st,stm32-rcc
33 - st,stm32f769-rcc
34 - const: st,stm32f746-rcc
35 - const: st,stm32-rcc
124 compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
[all …]
H A Dst,stm32mp1-rcc.yaml4 $id: http://devicetree.org/schemas/clock/st,stm32mp1-rcc.yaml#
59 - st,stm32mp1-rcc-secure
60 - st,stm32mp1-rcc
61 - st,stm32mp13-rcc
86 - st,stm32mp1-rcc-secure
87 - st,stm32mp13-rcc
119 rcc: rcc@50000000 {
120 compatible = "st,stm32mp1-rcc-secure", "syscon";
H A Dst,stm32h7-rcc.txt11 "st,stm32h743-rcc"
31 rcc: reset-clock-controller@58024400 {
32 compatible = "st,stm32h743-rcc", "st,stm32-rcc";
50 clocks = <&rcc TIM5_CK>;
70 resets = <&rcc STM32H7_APB1L_RESET(TIM2)>;
/linux-6.15/drivers/clk/qcom/
H A Dclk-rpm.c258 mutex_lock(&rcc->xo_lock); in clk_rpm_xo_prepare()
279 mutex_lock(&rcc->xo_lock); in clk_rpm_xo_unprepare()
514 struct rpm_cc *rcc = data; in qcom_rpm_clk_hw_get() local
522 return rcc->clks[idx] ? &rcc->clks[idx]->hw : ERR_PTR(-ENOENT); in qcom_rpm_clk_hw_get()
527 struct rpm_cc *rcc; in rpm_clk_probe() local
547 rcc = devm_kzalloc(&pdev->dev, sizeof(*rcc), GFP_KERNEL); in rpm_clk_probe()
548 if (!rcc) in rpm_clk_probe()
551 rcc->clks = rpm_clks; in rpm_clk_probe()
552 rcc->num_clks = num_clks; in rpm_clk_probe()
553 mutex_init(&rcc->xo_lock); in rpm_clk_probe()
[all …]
/linux-6.15/Documentation/devicetree/bindings/net/
H A Dstm32-dwmac.yaml178 clocks = <&rcc ETHMAC>,
179 <&rcc ETHTX>,
180 <&rcc ETHRX>,
181 <&rcc ETHSTP>,
182 <&rcc ETHCK_K>;
199 clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>;
215 clocks = <&rcc 62>, <&rcc 61>, <&rcc 60>;
/linux-6.15/Documentation/devicetree/bindings/i2c/
H A Dst,stm32-i2c.yaml145 #include <dt-bindings/mfd/stm32f7-rcc.h>
153 resets = <&rcc 277>;
154 clocks = <&rcc 0 149>;
160 #include <dt-bindings/mfd/stm32f7-rcc.h>
168 resets = <&rcc STM32F7_APB1_RESET(I2C1)>;
169 clocks = <&rcc 1 CLK_I2C1>;
175 #include <dt-bindings/mfd/stm32f7-rcc.h>
186 clocks = <&rcc I2C2_K>;
187 resets = <&rcc I2C2_R>;
/linux-6.15/Documentation/devicetree/bindings/media/
H A Dst,stm32mp25-csi.yaml92 #include <dt-bindings/clock/st,stm32mp25-rcc.h>
95 #include <dt-bindings/reset/st,stm32mp25-rcc.h>
100 resets = <&rcc CSI_R>;
101 clocks = <&rcc CK_KER_CSI>, <&rcc CK_KER_CSITXESC>, <&rcc CK_KER_CSIPHY>;
/linux-6.15/Documentation/devicetree/bindings/rtc/
H A Dst,stm32-rtc.yaml148 #include <dt-bindings/mfd/stm32f4-rcc.h>
153 clocks = <&rcc 1 CLK_RTC>;
154 assigned-clocks = <&rcc 1 CLK_RTC>;
155 assigned-clock-parents = <&rcc 1 CLK_LSE>;
167 clocks = <&rcc RTCAPB>, <&rcc RTC>;

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