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Searched refs:rb0_mask (Results 1 – 3 of 3) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v6_0.c1420 unsigned rb0_mask = 1 << (se * rb_per_se); in gfx_v6_0_write_harvested_raster_configs() local
1421 unsigned rb1_mask = rb0_mask << 1; in gfx_v6_0_write_harvested_raster_configs()
1423 rb0_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1425 if (!rb0_mask || !rb1_mask) { in gfx_v6_0_write_harvested_raster_configs()
1428 if (!rb0_mask) in gfx_v6_0_write_harvested_raster_configs()
1437 rb0_mask = 1 << (se * rb_per_se + rb_per_pkr); in gfx_v6_0_write_harvested_raster_configs()
1438 rb1_mask = rb0_mask << 1; in gfx_v6_0_write_harvested_raster_configs()
1439 rb0_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1441 if (!rb0_mask || !rb1_mask) { in gfx_v6_0_write_harvested_raster_configs()
1444 if (!rb0_mask) in gfx_v6_0_write_harvested_raster_configs()
H A Dgfx_v7_0.c1700 unsigned rb0_mask = 1 << (se * rb_per_se); in gfx_v7_0_write_harvested_raster_configs() local
1701 unsigned rb1_mask = rb0_mask << 1; in gfx_v7_0_write_harvested_raster_configs()
1703 rb0_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1705 if (!rb0_mask || !rb1_mask) { in gfx_v7_0_write_harvested_raster_configs()
1708 if (!rb0_mask) { in gfx_v7_0_write_harvested_raster_configs()
1718 rb0_mask = 1 << (se * rb_per_se + rb_per_pkr); in gfx_v7_0_write_harvested_raster_configs()
1719 rb1_mask = rb0_mask << 1; in gfx_v7_0_write_harvested_raster_configs()
1720 rb0_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1722 if (!rb0_mask || !rb1_mask) { in gfx_v7_0_write_harvested_raster_configs()
1725 if (!rb0_mask) { in gfx_v7_0_write_harvested_raster_configs()
H A Dgfx_v8_0.c3558 unsigned rb0_mask = 1 << (se * rb_per_se); in gfx_v8_0_write_harvested_raster_configs() local
3559 unsigned rb1_mask = rb0_mask << 1; in gfx_v8_0_write_harvested_raster_configs()
3561 rb0_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3563 if (!rb0_mask || !rb1_mask) { in gfx_v8_0_write_harvested_raster_configs()
3566 if (!rb0_mask) { in gfx_v8_0_write_harvested_raster_configs()
3576 rb0_mask = 1 << (se * rb_per_se + rb_per_pkr); in gfx_v8_0_write_harvested_raster_configs()
3577 rb1_mask = rb0_mask << 1; in gfx_v8_0_write_harvested_raster_configs()
3578 rb0_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3580 if (!rb0_mask || !rb1_mask) { in gfx_v8_0_write_harvested_raster_configs()
3583 if (!rb0_mask) { in gfx_v8_0_write_harvested_raster_configs()