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Searched refs:qos_level_low_wm (Results 1 – 23 of 23) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer_debug.c158 …(s->qos_level_low_wm * frac) / ref_clk_mhz / frac, (s->qos_level_low_wm * frac) / ref_clk_mhz % fr… in dcn10_get_hubp_states()
178 …(s->qos_level_low_wm * frac) / ref_clk_mhz / frac, (s->qos_level_low_wm * frac) / ref_clk_mhz % fr… in dcn10_get_hubp_states()
312 …pool->hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_v… in dcn10_get_ttu_states()
/linux-6.15/drivers/gpu/drm/amd/display/dc/hubp/dcn21/
H A Ddcn21_hubp.c479 QoS_LEVEL_LOW_WM, &ttu_attr.qos_level_low_wm, in hubp21_validate_dml_output()
482 if (ttu_attr.qos_level_low_wm != dml_ttu_attr->qos_level_low_wm) in hubp21_validate_dml_output()
484 dml_ttu_attr->qos_level_low_wm, ttu_attr.qos_level_low_wm); in hubp21_validate_dml_output()
/linux-6.15/drivers/gpu/drm/amd/display/dc/hubp/dcn20/
H A Ddcn20_hubp.c147 QoS_LEVEL_LOW_WM, ttu_attr->qos_level_low_wm, in hubp2_program_deadline()
1243 QoS_LEVEL_LOW_WM, &ttu_attr->qos_level_low_wm, in hubp2_read_state_common()
1307 QoS_LEVEL_LOW_WM, &s->qos_level_low_wm, in hubp2_read_state_common()
1588 QoS_LEVEL_LOW_WM, &ttu_attr.qos_level_low_wm, in hubp2_validate_dml_output()
1591 if (ttu_attr.qos_level_low_wm != dml_ttu_attr->qos_level_low_wm) in hubp2_validate_dml_output()
1593 dml_ttu_attr->qos_level_low_wm, ttu_attr.qos_level_low_wm); in hubp2_validate_dml_output()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/
H A Ddml_top_dchub_registers.h62 uint32_t qos_level_low_wm; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_rq_dlg_helpers.c323 ttu_regs->qos_level_low_wm); in print__ttu_regs_st()
H A Ddisplay_mode_structs.h676 unsigned int qos_level_low_wm; member
H A Ddml1_display_rq_dlg_calc.c1903 disp_ttu_regs->qos_level_low_wm = 0; in dml1_rq_dlg_get_dlg_params()
1904 ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14)); in dml1_rq_dlg_get_dlg_params()
/linux-6.15/drivers/gpu/drm/amd/display/dc/hubp/dcn401/
H A Ddcn401_hubp.c280 QoS_LEVEL_LOW_WM, ttu_attr->qos_level_low_wm, in hubp401_program_deadline()
898 QoS_LEVEL_LOW_WM, &ttu_attr->qos_level_low_wm, in hubp401_read_state()
962 QoS_LEVEL_LOW_WM, &s->qos_level_low_wm, in hubp401_read_state()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml_display_rq_dlg_calc.c490 disp_ttu_regs->qos_level_low_wm = 0; in dml_rq_dlg_get_dlg_reg()
555 ASSERT(disp_ttu_regs->qos_level_low_wm < (dml_uint_t) dml_pow(2, 14)); in dml_rq_dlg_get_dlg_reg()
H A Ddisplay_mode_util.c304 dml_print("DML: qos_level_low_wm = 0x%x\n", ttu_regs->qos_level_low_wm); in dml_print_ttu_regs_st()
H A Ddml2_translation_helper.c1523 out->ttu_regs.qos_level_low_wm = disp_ttu_regs->qos_level_low_wm; in dml2_update_pipe_ctx_dchub_regs()
H A Ddisplay_mode_core_structs.h1980 dml_uint_t qos_level_low_wm; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_rq_dlg_calc_32.c541 ttu_regs->qos_level_low_wm = 0; in dml32_rq_dlg_get_dlg_reg()
607 ASSERT(ttu_regs->qos_level_low_wm < dml_pow(2, 14)); in dml32_rq_dlg_get_dlg_reg()
/linux-6.15/drivers/gpu/drm/amd/display/dc/hubp/dcn10/
H A Ddcn10_hubp.c672 QoS_LEVEL_LOW_WM, ttu_attr->qos_level_low_wm, in hubp1_program_deadline()
1012 QoS_LEVEL_LOW_WM, &ttu_attr->qos_level_low_wm, in hubp1_read_state_common()
1076 QoS_LEVEL_LOW_WM, &s->qos_level_low_wm, in hubp1_read_state_common()
H A Ddcn10_hubp.h687 uint32_t qos_level_low_wm; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_rq_dlg_calc_21.c1616 disp_ttu_regs->qos_level_low_wm = 0; in dml_rq_dlg_get_dlg_params()
1617 ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14)); in dml_rq_dlg_get_dlg_params()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddisplay_rq_dlg_calc_20.c1508 disp_ttu_regs->qos_level_low_wm = 0; in dml20_rq_dlg_get_dlg_params()
1509 ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14)); in dml20_rq_dlg_get_dlg_params()
H A Ddisplay_rq_dlg_calc_20v2.c1509 disp_ttu_regs->qos_level_low_wm = 0; in dml20v2_rq_dlg_get_dlg_params()
1510 ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14)); in dml20v2_rq_dlg_get_dlg_params()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_rq_dlg_calc_30.c1705 disp_ttu_regs->qos_level_low_wm = 0; in dml_rq_dlg_get_dlg_params()
1706 ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14)); in dml_rq_dlg_get_dlg_params()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddisplay_rq_dlg_calc_31.c1522 disp_ttu_regs->qos_level_low_wm = 0; in dml_rq_dlg_get_dlg_params()
1523 ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14)); in dml_rq_dlg_get_dlg_params()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddisplay_rq_dlg_calc_314.c1610 disp_ttu_regs->qos_level_low_wm = 0; in dml_rq_dlg_get_dlg_params()
1611 ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14)); in dml_rq_dlg_get_dlg_params()
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.c202 DTN_INFO_MICRO_SEC(s->qos_level_low_wm); in dcn10_log_hubp_states()
276 …pool->hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_v… in dcn10_log_hubp_states()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
H A Ddml2_core_dcn4_calcs.c12654 disp_ttu_regs->qos_level_low_wm = 0; in rq_dlg_get_dlg_reg()
12712 DML2_ASSERT(disp_ttu_regs->qos_level_low_wm < (unsigned int)math_pow(2, 14)); in rq_dlg_get_dlg_reg()