| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn4.c | 276 programming->fams2_required = display_cfg->stage3.fams2_required; in pack_mode_programming_params_with_implicit_subvp()
287 …programming->stream_programming[stream_index].stream_descriptor = &programming->display_config.str… in pack_mode_programming_params_with_implicit_subvp()
314 …programming->plane_programming[plane_index].plane_descriptor = &programming->display_config.plane_… in pack_mode_programming_params_with_implicit_subvp()
337 …programming->plane_programming[plane_index].pipe_regs[pipe_offset] = &programming->pipe_regs[total… in pack_mode_programming_params_with_implicit_subvp()
348 …programming->stream_programming[main_plane->stream_index].uclk_pstate_method = programming->plane_… in pack_mode_programming_params_with_implicit_subvp()
391 …programming->plane_programming[main_plane_index].phantom_plane.pipe_regs[pipe_offset] = &programmi… in pack_mode_programming_params_with_implicit_subvp()
560 l->mode_programming_ex_params.programming = in_out->programming; in core_dcn4_mode_programming()
603 …in_out->programming->plane_programming[plane_index].plane_descriptor = &in_out->programming->displ… in core_dcn4_mode_programming()
606 …in_out->programming->plane_programming[plane_index].pipe_regs[pipe_offset] = &in_out->programming-… in core_dcn4_mode_programming()
617 …in_out->programming->stream_programming[main_stream_index].stream_descriptor = &in_out->programmin… in core_dcn4_mode_programming()
[all …]
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/ |
| H A D | dml2_dpmm_dcn4.c | 574 in_out->programming->uclk_pstate_supported = true; in determine_power_management_features_with_fams()
605 …if (in_out->programming->min_clocks.dcn4x.svp_prefetch.uclk_khz > in_out->programming->min_clocks.… in map_mode_to_soc_dpm()
606 …in_out->programming->min_clocks.dcn4x.active.uclk_khz = in_out->programming->min_clocks.dcn4x.svp_… in map_mode_to_soc_dpm()
608 …if (in_out->programming->min_clocks.dcn4x.svp_prefetch.fclk_khz > in_out->programming->min_clocks.… in map_mode_to_soc_dpm()
609 …in_out->programming->min_clocks.dcn4x.active.fclk_khz = in_out->programming->min_clocks.dcn4x.svp_… in map_mode_to_soc_dpm()
611 …if (in_out->programming->min_clocks.dcn4x.svp_prefetch.dcfclk_khz > in_out->programming->min_clock… in map_mode_to_soc_dpm()
612 …in_out->programming->min_clocks.dcn4x.active.dcfclk_khz = in_out->programming->min_clocks.dcn4x.sv… in map_mode_to_soc_dpm()
637 …&in_out->programming->min_clocks.dcn4x.dispclk_khz, &in_out->programming->min_clocks.dcn4x.dpprefc… in map_mode_to_soc_dpm()
661 in_out->programming->fclk_pstate_supported = false; in map_mode_to_soc_dpm()
662 in_out->programming->uclk_pstate_supported = false; in map_mode_to_soc_dpm()
[all …]
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/ |
| H A D | dml21_wrapper.c | 31 …(*dml_ctx)->v21.mode_programming.programming = vzalloc(sizeof(struct dml2_display_cfg_programming)… in dml21_allocate_memory()
32 if (!((*dml_ctx)->v21.mode_programming.programming)) in dml21_allocate_memory()
120 vfree(dml2->v21.mode_programming.programming); in dml21_destroy()
147 dml_phantom_prog_idx = in_ctx->v21.mode_programming.programming->display_config.num_planes; in dml21_calculate_rq_and_dlg_params()
150 pln_prog = &in_ctx->v21.mode_programming.programming->plane_programming[dml_prog_idx]; in dml21_calculate_rq_and_dlg_params()
281 …_mode_programming_locals.mode_programming_params.programming = dml_ctx->v21.mode_programming.progr… in dml21_check_mode_support()
323 dml_phantom_prog_idx = dml_ctx->v21.mode_programming.programming->display_config.num_planes; in dml21_prepare_mcache_programming()
327 pln_prog = &dml_ctx->v21.mode_programming.programming->plane_programming[dml_prog_idx]; in dml21_prepare_mcache_programming()
378 pln_prog = &dml_ctx->v21.mode_programming.programming->plane_programming[dml_prog_idx]; in dml21_prepare_mcache_programming()
419 …dml2_display_cfg_programming *dst_dml2_programming = dst_dml_ctx->v21.mode_programming.programming; in dml21_copy()
[all …]
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| H A D | dml21_utils.c | 65 …if (dml_ctx->v21.mode_programming.programming->plane_programming[i].plane_descriptor->stream_index… in find_valid_pipe_idx_for_stream_index()
105 …dml_stream_index = dml_ctx->v21.mode_programming.programming->plane_programming[dml_plane_idx].pla… in dml21_find_dc_pipes_for_plane()
330 …for (dml_stream_index = 0; dml_stream_index < dml_ctx->v21.mode_programming.programming->display_c… in dml21_handle_phantom_streams_planes()
332 …if (dml_ctx->v21.mode_programming.programming->stream_programming[dml_stream_index].phantom_stream… in dml21_handle_phantom_streams_planes()
347 &dml_ctx->v21.mode_programming.programming->stream_programming[dml_stream_index]); in dml21_handle_phantom_streams_planes()
353 …for (dml_plane_index = 0; dml_plane_index < dml_ctx->v21.mode_programming.programming->display_con… in dml21_handle_phantom_streams_planes()
365 &dml_ctx->v21.mode_programming.programming->plane_programming[dml_plane_index]); in dml21_handle_phantom_streams_planes()
389 if (dml_ctx->v21.mode_programming.programming->fams2_required) { in dml21_build_fams2_programming()
415 … &dml_ctx->v21.mode_programming.programming->stream_programming[dml_stream_idx].fams2_base_params, in dml21_build_fams2_programming()
418 … &dml_ctx->v21.mode_programming.programming->stream_programming[dml_stream_idx].fams2_sub_params, in dml21_build_fams2_programming()
[all …]
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| H A D | dml21_translation_helper.c | 1077 …context->bw_ctx.bw.dcn.clk.dispclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4… in dml21_copy_clocks_to_dc_state()
1078 …context->bw_ctx.bw.dcn.clk.dcfclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x… in dml21_copy_clocks_to_dc_state()
1079 …context->bw_ctx.bw.dcn.clk.dramclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4… in dml21_copy_clocks_to_dc_state()
1080 …context->bw_ctx.bw.dcn.clk.fclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.a… in dml21_copy_clocks_to_dc_state()
1082 …context->bw_ctx.bw.dcn.clk.idle_fclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dc… in dml21_copy_clocks_to_dc_state()
1085 …context->bw_ctx.bw.dcn.clk.p_state_change_support = in_ctx->v21.mode_programming.programming->uclk… in dml21_copy_clocks_to_dc_state()
1086 …context->bw_ctx.bw.dcn.clk.dtbclk_en = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.… in dml21_copy_clocks_to_dc_state()
1088 …context->bw_ctx.bw.dcn.clk.socclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x… in dml21_copy_clocks_to_dc_state()
1121 const struct dml2_display_cfg_programming *programming = in_ctx->v21.mode_programming.programming; in dml21_extract_watermark_sets() local
1126 for (wm_index = 0; wm_index < programming->global_regs.num_watermark_sets; wm_index++) { in dml21_extract_watermark_sets()
[all …]
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| /linux-6.15/Documentation/ABI/testing/ |
| H A D | sysfs-class-fpga-manager | 13 wrong during FPGA programming (something that the driver can't
30 * write init = preparing FPGA for programming
31 * write init error = Error while preparing FPGA for programming
33 * write error = Error while programming
34 * write complete = Doing post programming steps
35 * write complete error = Error while doing post programming
43 If FPGA programming operation fails, it could be caused by crc
46 programming errors to userspace. This is a list of strings for
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| /linux-6.15/Documentation/input/ |
| H A D | input_kapi.rst | 12 input-programming
13 gameport-programming
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| /linux-6.15/Documentation/driver-api/fpga/ |
| H A D | fpga-programming.rst | 7 The in-kernel API for FPGA programming is a combination of APIs from
9 trigger FPGA programming is fpga_region_program_fpga().
31 bridges to control during programming or it has a pointer to a function that
71 /* Add info to region and do the programming */
84 API for programming an FPGA
|
| H A D | fpga-region.rst | 20 enumeration after programming.
24 * which FPGA manager to use to do the programming
26 * which bridges to disable before programming and enable afterwards.
60 Manager it will be using to do the programming. This usually would happen
68 The FPGA region will need to specify which bridges to control while programming
71 the list of bridges to program just before programming
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| H A D | intro.rst | 26 If you are adding a new FPGA or a new method of programming an FPGA,
36 region of an FPGA during programming. They are disabled before
37 programming begins and re-enabled afterwards. An FPGA bridge may be
|
| H A D | index.rst | 14 fpga-programming
|
| H A D | fpga-mgr.rst | 7 The FPGA manager core exports a set of functions for programming an FPGA with
18 The particulars for programming the image are presented in a structure (struct
80 do the programming sequence for this particular FPGA. These ops return 0 for
83 The programming sequence is::
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/ |
| H A D | dml2_top_soc15.c | 812 l->dppm_map_mode_params.programming = dpmm_programming; in dml2_top_soc15_check_mode_supported()
836 memset(in_out->programming, 0, sizeof(struct dml2_display_cfg_programming)); in dml2_top_soc15_build_mode_programming()
862 l->informative_params.programming = in_out->programming; in dml2_top_soc15_build_mode_programming()
901 l->informative_params.programming = in_out->programming; in dml2_top_soc15_build_mode_programming()
906 in_out->programming->informative.failed_mcache_validation = true; in dml2_top_soc15_build_mode_programming()
984 l->dppm_map_mode_params.programming = in_out->programming; in dml2_top_soc15_build_mode_programming()
989 in_out->programming->informative.failed_dpmm = true; in dml2_top_soc15_build_mode_programming()
996 l->mode_programming_params.programming = in_out->programming; in dml2_top_soc15_build_mode_programming()
999 in_out->programming->informative.failed_mode_programming = true; in dml2_top_soc15_build_mode_programming()
1005 l->dppm_map_watermarks_params.programming = in_out->programming; in dml2_top_soc15_build_mode_programming()
[all …]
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| /linux-6.15/Documentation/userspace-api/media/v4l/ |
| H A D | metafmt-pisp-fe.rst | 19 provide detailed description of the Front End configuration and programming
38 provide detailed description of the Front End configuration and programming
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| /linux-6.15/Documentation/driver-api/soundwire/ |
| H A D | error_handling.rst | 16 Improvements could be invalidating an entire programming sequence and
22 that bus clashes due to programming errors (two streams using the same bit
34 be applied. In case of a bad programming (command sent to non-existent
38 backtracking and restarting the entire programming sequence might be a
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| /linux-6.15/Documentation/misc-devices/ |
| H A D | c2port.rst | 26 C2 Interface used for in-system programming of micro controllers.
45 banging) designed to enable in-system programming, debugging, and
47 this code supports only flash programming but extensions are easy to
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/ |
| H A D | dml2_internal_shared_types.h | 89 struct dml2_display_cfg_programming *programming; member
102 struct dml2_display_cfg_programming *programming; member
106 struct dml2_display_cfg_programming programming; member
399 struct dml2_display_cfg_programming *programming; member
417 struct dml2_display_cfg_programming *programming; member
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| /linux-6.15/Documentation/devicetree/bindings/clock/ |
| H A D | keystone-pll.txt | 46 - bit-mask : arbitrary bitmask for programming the mux
68 - bit-mask : arbitrary bitmask for programming the divider
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| /linux-6.15/Documentation/devicetree/bindings/iommu/ |
| H A D | arm,smmu.yaml | 313 through the TCU's programming interface.
325 through the TCU's programming interface.
327 through the TCU's programming interface.
355 through the TCU's programming interface.
368 through the TCU's programming interface.
370 through the TCU's programming interface.
394 through the TCU's programming interface.
451 through the TCU's programming interface.
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| /linux-6.15/Documentation/arch/ |
| H A D | index.rst | 6 These books provide programming details about architecture-specific
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| /linux-6.15/Documentation/translations/sp_SP/process/ |
| H A D | index.rst | 21 programming-language
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| /linux-6.15/Documentation/devicetree/bindings/virtio/ |
| H A D | pci-iommu.yaml | 13 When virtio-iommu uses the PCI transport, its programming interface is
73 /* The IOMMU programming interface uses slot 00:01.0 */
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| /linux-6.15/Documentation/driver-api/ |
| H A D | i2c.rst | 16 The Linux I2C programming interfaces support the master side of bus
17 interactions and the slave side. The programming interface is
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| /linux-6.15/Documentation/crypto/ |
| H A D | index.rst | 10 for cryptographic use cases, as well as programming examples.
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| /linux-6.15/Documentation/devicetree/bindings/clock/ti/ |
| H A D | ti,mux-clock.yaml | 22 Results in programming the register as follows:
70 Valid input select programming starts at 1, not zero
|