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Searched refs:pp_idx (Results 1 – 9 of 9) sorted by relevance

/linux-6.15/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_rm.c332 *pp_idx = idx; in _dpu_rm_check_lm_and_get_connected_blks()
522 int pp_idx = 0; in _dpu_rm_dsc_alloc() local
534 pp_idx = _dpu_rm_pingpong_next_index(global_state, pp_idx, crtc_id); in _dpu_rm_dsc_alloc()
535 if (pp_idx < 0) in _dpu_rm_dsc_alloc()
544 pp_idx++; in _dpu_rm_dsc_alloc()
577 pp_idx = _dpu_rm_pingpong_next_index(global_state, pp_idx, crtc_id); in _dpu_rm_dsc_alloc_pair()
578 if (pp_idx < 0) in _dpu_rm_dsc_alloc_pair()
583 pp_idx = 0; in _dpu_rm_dsc_alloc_pair()
587 pp_idx = _dpu_rm_pingpong_next_index(global_state, pp_idx + 1, crtc_id); in _dpu_rm_dsc_alloc_pair()
588 if (pp_idx < 0) in _dpu_rm_dsc_alloc_pair()
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H A Ddpu_hw_top.c182 int pp_idx = cfg->ppnumber[i] - PINGPONG_0; in dpu_hw_setup_vsync_sel() local
184 if (pp_idx >= ARRAY_SIZE(pp_offset)) in dpu_hw_setup_vsync_sel()
187 reg &= ~(0xf << pp_offset[pp_idx]); in dpu_hw_setup_vsync_sel()
188 reg |= (cfg->vsync_source & 0xf) << pp_offset[pp_idx]; in dpu_hw_setup_vsync_sel()
H A Ddpu_hw_cwb.h26 enum dpu_pingpong pp_idx; member
H A Ddpu_hw_cwb.c30 pp = cwb_cfg->pp_idx; in dpu_hw_cwb_config()
H A Ddpu_trace.h194 unsigned int irq_reg, unsigned int irq_bit, enum dpu_pingpong pp_idx, int atomic_cnt),
195 TP_ARGS(drm_id, func, irq_reg, irq_bit, pp_idx, atomic_cnt),
201 __field( enum dpu_pingpong, pp_idx )
209 __entry->pp_idx = pp_idx;
214 __entry->irq_reg, __entry->irq_bit, __entry->pp_idx, __entry->atomic_cnt)
H A Ddpu_encoder.c2375 cwb_cfg.pp_idx = hw_pp->idx; in dpu_encoder_helper_phys_setup_cwb()
2377 cwb_cfg.pp_idx = PINGPONG_NONE; in dpu_encoder_helper_phys_setup_cwb()
/linux-6.15/drivers/media/platform/mediatek/mdp3/
H A Dmtk-mdp3-cmdq.c107 u8 pp_idx) in __get_config_offset() argument
114 if (pp_idx >= mdp->mdp_data->pp_used) in __get_config_offset()
118 cfg_c = CFG_OFST(MT8183, param->config, pp_idx); in __get_config_offset()
119 cfg_n = CFG_OFST(MT8183, param->config, pp_idx + 1); in __get_config_offset()
121 cfg_c = CFG_OFST(MT8195, param->config, pp_idx); in __get_config_offset()
122 cfg_n = CFG_OFST(MT8195, param->config, pp_idx + 1); in __get_config_offset()
548 u8 pp_idx) in mdp_cmdq_prepare() argument
561 config = __get_config_offset(mdp, param, pp_idx); in mdp_cmdq_prepare()
627 dev_err(dev, "mdp_path_config error %d\n", pp_idx); in mdp_cmdq_prepare()
654 cmd->pp_idx = pp_idx; in mdp_cmdq_prepare()
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H A Dmtk-mdp3-cmdq.h38 u8 pp_idx; member
/linux-6.15/drivers/net/
H A Dveth.c202 int i, j, idx, pp_idx; in veth_get_ethtool_stats() local
221 pp_idx = idx; in veth_get_ethtool_stats()
242 pp_idx = idx + dev->real_num_tx_queues * VETH_TQ_STATS_LEN; in veth_get_ethtool_stats()
245 veth_get_page_pool_stats(dev, &data[pp_idx]); in veth_get_ethtool_stats()