Searched refs:pll_mux (Results 1 – 5 of 5) sorted by relevance
| /linux-6.15/drivers/clk/rockchip/ |
| H A D | clk-pll.c | 29 struct clk_mux pll_mux; member
193 struct clk_mux *pll_mux = &pll->pll_mux; in rockchip_rk3036_pll_set_params() local
430 struct clk_mux *pll_mux = &pll->pll_mux; in rockchip_rk3066_pll_set_params() local
677 struct clk_mux *pll_mux = &pll->pll_mux; in rockchip_rk3399_pll_set_params() local
929 struct clk_mux *pll_mux = &pll->pll_mux; in rockchip_rk3588_pll_set_params() local
1072 struct clk_mux *pll_mux; in rockchip_clk_register_pll() local
1091 pll_mux = &pll->pll_mux; in rockchip_clk_register_pll()
1093 pll_mux->shift = mode_shift; in rockchip_clk_register_pll()
1098 pll_mux->flags = 0; in rockchip_clk_register_pll()
1099 pll_mux->lock = &ctx->lock; in rockchip_clk_register_pll()
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| /linux-6.15/drivers/clk/socfpga/ |
| H A D | clk-s10.c | 14 static const struct clk_parent_data pll_mux[] = { variable
185 { STRATIX10_MAIN_PLL_CLK, "main_pll", pll_mux, ARRAY_SIZE(pll_mux),
187 { STRATIX10_PERIPH_PLL_CLK, "periph_pll", pll_mux, ARRAY_SIZE(pll_mux),
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| H A D | clk-agilex.c | 14 static const struct clk_parent_data pll_mux[] = { variable
229 { AGILEX_MAIN_PLL_CLK, "main_pll", pll_mux, ARRAY_SIZE(pll_mux),
231 { AGILEX_PERIPH_PLL_CLK, "periph_pll", pll_mux, ARRAY_SIZE(pll_mux),
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| /linux-6.15/drivers/gpu/drm/msm/dsi/phy/ |
| H A D | dsi_phy_10nm.c | 67 u8 pll_mux; member
488 cached->pll_mux = cmn_clk_cfg1 & 0x3; in dsi_10nm_pll_save_state()
492 cached->pix_clk_div, cached->pll_mux); in dsi_10nm_pll_save_state()
513 val |= cached->pll_mux; in dsi_10nm_pll_restore_state()
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| H A D | dsi_phy_7nm.c | 75 u8 pll_mux; member
581 cached->pll_mux = FIELD_GET(DSI_7nm_PHY_CMN_CLK_CFG1_DSICLK_SEL__MASK, cmn_clk_cfg1); in dsi_7nm_pll_save_state()
585 cached->pix_clk_div, cached->pll_mux); in dsi_7nm_pll_save_state()
604 cached->pll_mux); in dsi_7nm_pll_restore_state()
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