Searched refs:pll_con1 (Results 1 – 1 of 1) sorted by relevance
| /linux-6.15/drivers/clk/samsung/ |
| H A D | clk-pll.c | 332 u32 mdiv, pdiv, sdiv, pll_con0, pll_con1; in samsung_pll36xx_recalc_rate() local
337 pll_con1 = readl_relaxed(pll->con_reg + 4); in samsung_pll36xx_recalc_rate()
341 kdiv = (s16)(pll_con1 & PLL36XX_KDIV_MASK); in samsung_pll36xx_recalc_rate()
367 u32 pll_con0, pll_con1; in samsung_pll36xx_set_rate() local
378 pll_con1 = readl_relaxed(pll->con_reg + 4); in samsung_pll36xx_set_rate()
402 pll_con1 |= rate->kdiv << PLL36XX_KDIV_SHIFT; in samsung_pll36xx_set_rate()
403 writel_relaxed(pll_con1, pll->con_reg + 4); in samsung_pll36xx_set_rate()
783 pll_con1 = readl_relaxed(pll->con_reg + 4); in samsung_pll46xx_recalc_rate()
789 pll_con1 & PLL46XX_KDIV_MASK; in samsung_pll46xx_recalc_rate()
1128 u32 mdiv, pdiv, sdiv, pll_con0, pll_con1; in samsung_pll2650x_recalc_rate() local
[all …]
|