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Searched refs:pll_clks (Results 1 – 20 of 20) sorted by relevance

/linux-6.15/drivers/clk/mmp/
H A Dclk-of-mmp2.c105 static struct mmp_param_pll_clk pll_clks[] = { variable
192 mmp_register_pll_clks(unit, pll_clks, in mmp2_main_clk_init()
194 ARRAY_SIZE(pll_clks)); in mmp2_main_clk_init()
/linux-6.15/drivers/clk/samsung/
H A Dclk.c337 if (cmu->pll_clks) in samsung_cmu_register_clocks()
338 samsung_clk_register_pll(ctx, cmu->pll_clks, cmu->nr_pll_clks); in samsung_cmu_register_clocks()
H A Dclk-exynos7870.c725 .pll_clks = mif_pll_clks,
1003 .pll_clks = dispaud_pll_clks,
1128 .pll_clks = fsys_pll_clks,
1240 .pll_clks = g3d_pll_clks,
1427 .pll_clks = isp_pll_clks,
H A Dclk-exynos5260.c398 .pll_clks = egl_pll_clks,
650 .pll_clks = g3d_pll_clks,
968 .pll_clks = kfc_pll_clks,
1171 .pll_clks = mif_pll_clks,
1831 .pll_clks = top_pll_clks,
H A Dclk-exynos850.c564 .pll_clks = top_pll_clks,
985 .pll_clks = aud_pll_clks,
1290 .pll_clks = cpucl0_pll_clks,
1445 .pll_clks = cpucl1_pll_clks,
1553 .pll_clks = g3d_pll_clks,
H A Dclk-exynos7885.c344 .pll_clks = top_pll_clks,
799 .pll_clks = fsys_pll_clks,
H A Dclk-exynos5410.c256 .pll_clks = exynos5410_plls,
H A Dclk.h344 const struct samsung_pll_clock *pll_clks; member
H A Dclk-fsd.c304 .pll_clks = cmu_pll_clks,
1542 .pll_clks = mfc_pll_clks,
1746 .pll_clks = cam_csi_pll_clks,
H A Dclk-exynos3250.c801 .pll_clks = exynos3250_plls,
923 .pll_clks = exynos3250_dmc_plls,
H A Dclk-exynos5433.c810 .pll_clks = top_pll_clks,
893 .pll_clks = cpif_pll_clks,
1545 .pll_clks = mif_pll_clks,
2899 .pll_clks = disp_pll_clks,
3356 .pll_clks = g3d_pll_clks,
3706 .pll_clks = apollo_pll_clks,
3950 .pll_clks = atlas_pll_clks,
H A Dclk-exynosautov9.c946 .pll_clks = top_pll_clks,
1512 .pll_clks = fsys1_pll_clks,
H A Dclk-exynosautov920.c986 .pll_clks = top_pll_clks,
H A Dclk-exynos990.c1123 .pll_clks = top_pll_clks,
H A Dclk-exynos7.c186 .pll_clks = topc_pll_clks,
H A Dclk-gs101.c1423 .pll_clks = cmu_top_pll_clks,
2365 .pll_clks = cmu_hsi0_pll_clks,
H A Dclk-exynos8895.c1289 .pll_clks = top_pll_clks,
H A Dclk-exynos2200.c1918 .pll_clks = top_pll_clks,
/linux-6.15/drivers/clk/sophgo/
H A Dclk-sg2042-pll.c474 struct sg2042_pll_clock pll_clks[], in sg2042_clk_register_plls() argument
482 pll = &pll_clks[i]; in sg2042_clk_register_plls()
/linux-6.15/drivers/phy/cadence/
H A Dphy-cadence-sierra.c407 struct clk *pll_clks[SIERRA_NUM_CMN_PLLC]; member
787 sp->pll_clks[clk_index] = devm_clk_hw_get_clk(dev, &mux->hw, in cdns_sierra_pll_mux_register()
1200 ret = clk_prepare_enable(sp->pll_clks[CDNS_SIERRA_PLL_CMNLC]); in cdns_sierra_phy_enable_clocks()
1204 ret = clk_prepare_enable(sp->pll_clks[CDNS_SIERRA_PLL_CMNLC1]); in cdns_sierra_phy_enable_clocks()
1211 clk_disable_unprepare(sp->pll_clks[CDNS_SIERRA_PLL_CMNLC]); in cdns_sierra_phy_enable_clocks()
1218 clk_disable_unprepare(sp->pll_clks[CDNS_SIERRA_PLL_CMNLC1]); in cdns_sierra_phy_disable_clocks()
1219 clk_disable_unprepare(sp->pll_clks[CDNS_SIERRA_PLL_CMNLC]); in cdns_sierra_phy_disable_clocks()