| /linux-6.15/drivers/gpu/drm/i915/display/ |
| H A D | intel_cx0_phy.c | 1297 .pll[0] = 0x34, .pll[1] = 0x00, .pll[2] = 0xC0, .pll[3] = 0x00, .pll[4] = 0x00,
1298 .pll[5] = 0x00, .pll[6] = 0x00, .pll[7] = 0x00, .pll[8] = 0x20, .pll[9] = 0xFF,
1307 .pll[0] = 0x04, .pll[1] = 0x00, .pll[2] = 0xCC, .pll[3] = 0x00, .pll[4] = 0x00,
1308 .pll[5] = 0x00, .pll[6] = 0x00, .pll[7] = 0x00, .pll[8] = 0x20, .pll[9] = 0xFF,
1317 .pll[0] = 0x04, .pll[1] = 0x00, .pll[2] = 0xDC, .pll[3] = 0x00, .pll[4] = 0x00,
1318 .pll[5] = 0x00, .pll[6] = 0x00, .pll[7] = 0x00, .pll[8] = 0x20, .pll[9] = 0xFF,
1327 .pll[0] = 0xF4, .pll[1] = 0x00, .pll[2] = 0x62, .pll[3] = 0x00, .pll[4] = 0x00,
1328 .pll[5] = 0x00, .pll[6] = 0x00, .pll[7] = 0x00, .pll[8] = 0x20, .pll[9] = 0xFF,
1337 .pll[0] = 0xC4, .pll[1] = 0x00, .pll[2] = 0x76, .pll[3] = 0x00, .pll[4] = 0x00,
1338 .pll[5] = 0x00, .pll[6] = 0x00, .pll[7] = 0x00, .pll[8] = 0x20, .pll[9] = 0xFF,
[all …]
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| /linux-6.15/drivers/clk/mediatek/ |
| H A D | clk-pll.c | 37 return (readl(pll->en_addr) & BIT(pll->data->pll_en_bit)) != 0; in mtk_pll_is_prepared()
107 if (pll->pd_addr != pll->pcw_addr) { in mtk_pll_set_rate_regs()
197 pcw = readl(pll->pcw_addr) >> pll->data->pcw_shift; in mtk_pll_recalc_rate()
228 r = readl(pll->en_addr) | BIT(pll->data->pll_en_bit); in mtk_pll_prepare()
267 r = readl(pll->en_addr) & ~BIT(pll->data->pll_en_bit); in mtk_pll_unprepare()
302 pll->pcw_chg_addr = pll->base_addr + REG_CON1; in mtk_clk_register_pll_ops()
310 pll->en_addr = pll->base_addr + REG_CON0; in mtk_clk_register_pll_ops()
337 pll = kzalloc(sizeof(*pll), GFP_KERNEL); in mtk_clk_register_pll()
338 if (!pll) in mtk_clk_register_pll()
343 kfree(pll); in mtk_clk_register_pll()
[all …]
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| /linux-6.15/drivers/clk/tegra/ |
| H A D | clk-pll.c | 362 val = pll_readl(pll->params->iddq_reg, pll); in _clk_pll_enable()
364 pll_writel(val, pll->params->iddq_reg, pll); in _clk_pll_enable()
413 val = pll_readl(pll->params->iddq_reg, pll); in _clk_pll_disable()
415 pll_writel(val, pll->params->iddq_reg, pll); in _clk_pll_disable()
770 ret = pll->params->dyn_ramp(pll, cfg); in _program_pll()
781 pll->params->set_defaults(pll); in _program_pll()
1045 pll->params->set_defaults(pll); in tegra_clk_pll_restore_context()
1630 val = pll_readl(pll->params->aux_reg, pll); in clk_plle_tegra114_enable()
1633 pll_writel(val, pll->params->aux_reg, pll); in clk_plle_tegra114_enable()
1875 pll = kzalloc(sizeof(*pll), GFP_KERNEL); in _tegra_init_pll()
[all …]
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| /linux-6.15/drivers/clk/qcom/ |
| H A D | clk-alpha-pll.c | 743 regmap_read(pll->clkr.regmap, PLL_MODE(pll), &mode); in __clk_alpha_pll_update_latch()
808 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l); in __clk_alpha_pll_set_rate()
1024 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l); in alpha_pll_huayra_set_rate()
1030 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l); in alpha_pll_huayra_set_rate()
1069 return trion_pll_is_enabled(pll, pll->clkr.regmap); in clk_trion_pll_is_enabled()
1469 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l); in alpha_pll_fabia_set_rate()
1470 regmap_write(pll->clkr.regmap, PLL_FRAC(pll), a); in alpha_pll_fabia_set_rate()
1670 (BIT(pll->width) - 1) << pll->post_div_shift, in clk_alpha_pll_postdiv_fabia_set_rate()
1974 if (trion_pll_is_enabled(pll, pll->clkr.regmap)) in alpha_pll_lucid_5lpe_enable()
2097 mask = GENMASK(pll->width + pll->post_div_shift - 1, pll->post_div_shift); in __clk_lucid_pll_postdiv_set_rate()
[all …]
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| H A D | clk-pll.c | 31 ret = regmap_read(pll->clkr.regmap, pll->mode_reg, &val); in clk_pll_enable()
71 regmap_read(pll->clkr.regmap, pll->mode_reg, &val); in clk_pll_disable()
76 regmap_update_bits(pll->clkr.regmap, pll->mode_reg, mask, 0); in clk_pll_disable()
87 regmap_read(pll->clkr.regmap, pll->l_reg, &l); in clk_pll_recalc_rate()
88 regmap_read(pll->clkr.regmap, pll->m_reg, &m); in clk_pll_recalc_rate()
89 regmap_read(pll->clkr.regmap, pll->n_reg, &n); in clk_pll_recalc_rate()
103 regmap_read(pll->clkr.regmap, pll->config_reg, &config); in clk_pll_recalc_rate()
153 regmap_read(pll->clkr.regmap, pll->mode_reg, &mode); in clk_pll_set_rate()
162 regmap_write(pll->clkr.regmap, pll->config_reg, f->ibits); in clk_pll_set_rate()
269 ret = regmap_read(pll->clkr.regmap, pll->mode_reg, &mode); in clk_pll_sr2_enable()
[all …]
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| /linux-6.15/drivers/video/fbdev/aty/ |
| H A D | mach64_ct.c | 126 divider = ((u32)pll->vclk_fb_div) * pll->xclk_ref_div; in aty_dsp_gt()
202 __func__, pll->dsp_config, pll->dsp_on_off); in aty_dsp_gt()
225 pll->vclk_fb_div = q * pll->vclk_post_div_real / 8; in aty_valid_pll_ct()
266 …ret = par->ref_clk_per * pll->ct.pll_ref_div * pll->ct.vclk_post_div_real / pll->ct.vclk_fb_div / … in aty_pll_to_var_ct()
293 pll->ct.pll_ext_cntl, pll->ct.pll_gen_cntl, pll->ct.pll_vclk_cntl); in aty_set_pll_ct()
298 pll->ct.pll_ref_div, pll->ct.vclk_post_div, pll->ct.vclk_post_div_real); in aty_set_pll_ct()
411 pll->ct.xclk_post_div = pll->ct.pll_ext_cntl & 0x07; in aty_init_pll_ct()
434 __func__, pll->ct.mclk_fb_mult, pll->ct.xclk_post_div); in aty_init_pll_ct()
487 if (pll->ct.xclkmaxrasdelay <= pll->ct.xclkpagefaultdelay) in aty_init_pll_ct()
488 pll->ct.xclkmaxrasdelay = pll->ct.xclkpagefaultdelay + 1; in aty_init_pll_ct()
[all …]
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| /linux-6.15/drivers/clk/sprd/ |
| H A D | pll.c | 19 (pll->factors[member].shift / (8 * sizeof(pll->regs_num)))
22 (pll->factors[member].shift % (8 * sizeof(pll->regs_num)))
29 GENMASK(pwidth(pll, member) + pshift(pll, member) - 1, \
33 (cfg[pindex(pll, member)] & pmask(pll, member))
36 (pinternal(pll, cfg, member) >> pshift(pll, member))
120 ((pll->fflag == 1 && pinternal(pll, cfg, PLL_POSTDIV)) || in _sprd_pll_recalc_rate()
121 (!pll->fflag && !pinternal(pll, cfg, PLL_POSTDIV)))) in _sprd_pll_recalc_rate()
133 k1 = pll->k1; in _sprd_pll_recalc_rate()
134 k2 = pll->k2; in _sprd_pll_recalc_rate()
174 if (width && ((pll->fflag == 1 && fvco <= pll->fvco) || in _sprd_pll_set_rate()
[all …]
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| /linux-6.15/drivers/clk/meson/ |
| H A D | clk-pll.c | 60 unsigned int frac_max = pll->frac_max ? pll->frac_max : in __pll_params_to_rate()
104 unsigned int frac_max = pll->frac_max ? pll->frac_max : in __pll_params_with_frac()
145 if (!pll->table[index].n) in meson_clk_get_pll_table_index()
148 *m = pll->table[index].m; in meson_clk_get_pll_table_index()
183 *m = pll->range->min; in meson_clk_get_pll_range_index()
186 *m = pll->range->max; in meson_clk_get_pll_range_index()
207 if (pll->range) in meson_clk_get_pll_get_index()
210 else if (pll->table) in meson_clk_get_pll_get_index()
228 i, &m, &n, pll); in meson_clk_get_pll_settings()
256 &m, &n, pll); in meson_clk_pll_determine_rate()
[all …]
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| /linux-6.15/drivers/clk/imx/ |
| H A D | clk-pllv3.c | 63 u32 val = readl_relaxed(pll->base) & pll->power_bit; in clk_pllv3_wait_lock()
115 u32 div = (readl_relaxed(pll->base) >> pll->div_shift) & pll->div_mask; in clk_pllv3_recalc_rate()
143 val &= ~(pll->div_mask << pll->div_shift); in clk_pllv3_set_rate()
163 u32 div = readl_relaxed(pll->base) & pll->div_mask; in clk_pllv3_sys_recalc_rate()
218 u32 mfn = readl_relaxed(pll->base + pll->num_offset); in clk_pllv3_av_recalc_rate()
220 u32 div = readl_relaxed(pll->base) & pll->div_mask; in clk_pllv3_av_recalc_rate()
288 writel_relaxed(mfn, pll->base + pll->num_offset); in clk_pllv3_av_set_rate()
289 writel_relaxed(mfd, pll->base + pll->denom_offset); in clk_pllv3_av_set_rate()
351 mf.mfn = readl_relaxed(pll->base + pll->num_offset); in clk_pllv3_vf610_recalc_rate()
421 pll = kzalloc(sizeof(*pll), GFP_KERNEL); in imx_clk_hw_pllv3()
[all …]
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| H A D | clk-pllv4.c | 85 mult = readl_relaxed(pll->base + pll->cfg_offset); in clk_pllv4_recalc_rate()
89 mfn = readl_relaxed(pll->base + pll->num_offset); in clk_pllv4_recalc_rate()
90 mfd = readl_relaxed(pll->base + pll->denom_offset); in clk_pllv4_recalc_rate()
197 val = readl_relaxed(pll->base + pll->cfg_offset); in clk_pllv4_set_rate()
200 writel_relaxed(val, pll->base + pll->cfg_offset); in clk_pllv4_set_rate()
202 writel_relaxed(mfn, pll->base + pll->num_offset); in clk_pllv4_set_rate()
203 writel_relaxed(mfd, pll->base + pll->denom_offset); in clk_pllv4_set_rate()
247 pll = kzalloc(sizeof(*pll), GFP_KERNEL); in imx_clk_hw_pllv4()
248 if (!pll) in imx_clk_hw_pllv4()
274 hw = &pll->hw; in imx_clk_hw_pllv4()
[all …]
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| H A D | clk-fracn-gppll.c | 257 readl(pll->base + PLL_DIV); in clk_fracn_gppll_set_rate()
270 readl(pll->base + PLL_CTRL); in clk_fracn_gppll_set_rate()
308 readl(pll->base + PLL_CTRL); in clk_fracn_gppll_prepare()
357 struct clk_fracn_gppll *pll; in _imx_clk_fracn_gppll() local
362 pll = kzalloc(sizeof(*pll), GFP_KERNEL); in _imx_clk_fracn_gppll()
363 if (!pll) in _imx_clk_fracn_gppll()
372 pll->base = base; in _imx_clk_fracn_gppll()
373 pll->hw.init = &init; in _imx_clk_fracn_gppll()
376 pll->flags = pll_flags; in _imx_clk_fracn_gppll()
378 hw = &pll->hw; in _imx_clk_fracn_gppll()
[all …]
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| H A D | clk-pll14xx.c | 257 if (pll->type == PLL_1443X) { in clk_pll14xx_recalc_rate()
371 pll->base + DIV_CTL1); in clk_pll1443x_set_rate()
494 struct clk_pll14xx *pll; in imx_dev_clk_hw_pll14xx() local
500 pll = kzalloc(sizeof(*pll), GFP_KERNEL); in imx_dev_clk_hw_pll14xx()
501 if (!pll) in imx_dev_clk_hw_pll14xx()
521 kfree(pll); in imx_dev_clk_hw_pll14xx()
525 pll->base = base; in imx_dev_clk_hw_pll14xx()
526 pll->hw.init = &init; in imx_dev_clk_hw_pll14xx()
527 pll->type = pll_clk->type; in imx_dev_clk_hw_pll14xx()
535 hw = &pll->hw; in imx_dev_clk_hw_pll14xx()
[all …]
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| /linux-6.15/drivers/clk/bcm/ |
| H A D | clk-iproc-pll.c | 308 struct iproc_pll *pll = clk->pll; in pll_set_rate() local
430 struct iproc_pll *pll = clk->pll; in iproc_pll_enable() local
438 struct iproc_pll *pll = clk->pll; in iproc_pll_disable() local
451 struct iproc_pll *pll = clk->pll; in iproc_pll_recalc_rate() local
501 struct iproc_pll *pll = clk->pll; in iproc_pll_determine_rate() local
546 struct iproc_pll *pll = clk->pll; in iproc_pll_set_rate() local
579 struct iproc_pll *pll = clk->pll; in iproc_clk_enable() local
599 struct iproc_pll *pll = clk->pll; in iproc_clk_disable() local
615 struct iproc_pll *pll = clk->pll; in iproc_clk_recalc_rate() local
775 iclk->pll = pll; in iproc_pll_clk_setup()
[all …]
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| H A D | clk-iproc-armpll.c | 112 fid = __get_fid(pll); in __get_mdiv()
198 return pll->rate; in iproc_arm_pll_recalc_rate()
204 pll->rate = 0; in iproc_arm_pll_recalc_rate()
216 pll->rate = 0; in iproc_arm_pll_recalc_rate()
220 pll->rate = (pll->rate / pdiv) / mdiv; in iproc_arm_pll_recalc_rate()
227 return pll->rate; in iproc_arm_pll_recalc_rate()
241 pll = kzalloc(sizeof(*pll), GFP_KERNEL); in iproc_armpll_setup()
242 if (WARN_ON(!pll)) in iproc_armpll_setup()
255 pll->hw.init = &init; in iproc_armpll_setup()
270 iounmap(pll->base); in iproc_armpll_setup()
[all …]
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| /linux-6.15/drivers/media/i2c/ |
| H A D | ccs-pll.c | 85 { &pll->vt_fr, &pll->vt_bk, PLL_VT }, in print_pll()
86 { &pll->op_fr, &pll->op_bk, PLL_OP } in print_pll()
387 pll->ext_clk_freq_hz * pll->vt_lanes); in ccs_pll_calculate_vt_tree()
461 * pll->vt_lanes * phy_const / pll->op_lanes in ccs_pll_calculate_vt()
568 pll->vt_bk.sys_clk_freq_hz / pll->vt_bk.pix_clk_div; in ccs_pll_calculate_vt()
572 pll->vt_bk.pix_clk_freq_hz * pll->vt_lanes; in ccs_pll_calculate_vt()
746 if (!pll->op_lanes || !pll->vt_lanes || !pll->bits_per_pixel || in ccs_pll_calculate()
747 !pll->ext_clk_freq_hz || !pll->link_freq || !pll->scale_m || in ccs_pll_calculate()
760 (pll->bits_per_pixel * pll->op_lanes) % in ccs_pll_calculate()
763 pll->bits_per_pixel, pll->op_lanes, pll->csi2.lanes, l); in ccs_pll_calculate()
[all …]
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| H A D | aptina-pll.c | 27 pll->ext_clock, pll->pix_clock); in aptina_pll_calculate()
35 if (pll->pix_clock == 0 || pll->pix_clock > limits->pix_clock_max) { in aptina_pll_calculate()
41 div = gcd(pll->pix_clock, pll->ext_clock); in aptina_pll_calculate()
42 pll->m = pll->pix_clock / div; in aptina_pll_calculate()
57 (pll->ext_clock / limits->n_min * pll->m)); in aptina_pll_calculate()
61 (pll->ext_clock / limits->n_max * pll->m)); in aptina_pll_calculate()
128 pll->ext_clock * pll->m)); in aptina_pll_calculate()
130 (pll->ext_clock * pll->m)); in aptina_pll_calculate()
146 pll->m *= mf_low; in aptina_pll_calculate()
147 pll->p1 = p1; in aptina_pll_calculate()
[all …]
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| /linux-6.15/drivers/clk/visconti/ |
| H A D | pll.c | 248 struct visconti_pll *pll; in visconti_register_pll() local
253 pll = kzalloc(sizeof(*pll), GFP_KERNEL); in visconti_register_pll()
254 if (!pll) in visconti_register_pll()
264 pll->rate_count = len; in visconti_register_pll()
266 pll->rate_count, sizeof(*pll->rate_table), in visconti_register_pll()
271 pll->hw.init = &init; in visconti_register_pll()
273 pll->lock = lock; in visconti_register_pll()
274 pll->ctx = ctx; in visconti_register_pll()
276 pll_hw_clk = &pll->hw; in visconti_register_pll()
280 kfree(pll->rate_table); in visconti_register_pll()
[all …]
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| /linux-6.15/drivers/clk/at91/ |
| H A D | clk-pll.c | 77 (div == pll->div && mul == pll->mul)) in clk_pll_prepare()
102 return clk_pll_ready(pll->regmap, pll->id); in clk_pll_is_prepared()
118 if (!pll->div || !pll->mul) in clk_pll_recalc_rate()
121 return (parent_rate / pll->div) * (pll->mul + 1); in clk_pll_recalc_rate()
270 pll->pms.rate = clk_pll_recalc_rate(&pll->hw, pll->pms.parent_rate); in clk_pll_save_context()
271 pll->pms.status = clk_pll_ready(pll->regmap, PLL_REG(pll->id)); in clk_pll_save_context()
284 out = pll->characteristics->out[pll->range]; in clk_pll_restore_context()
286 regmap_read(pll->regmap, PLL_REG(pll->id), &pllr); in clk_pll_restore_context()
294 pll->pms.status != clk_pll_ready(pll->regmap, PLL_REG(pll->id)) || in clk_pll_restore_context()
327 pll = kzalloc(sizeof(*pll), GFP_KERNEL); in at91_clk_register_pll()
[all …]
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| /linux-6.15/drivers/clk/rockchip/ |
| H A D | clk-pll.c | 1085 pll = kzalloc(sizeof(*pll), GFP_KERNEL); in rockchip_clk_register_pll()
1086 if (!pll) in rockchip_clk_register_pll()
1143 pll->rate_count = len; in rockchip_clk_register_pll()
1145 pll->rate_count, in rockchip_clk_register_pll()
1156 if (!pll->rate_table) in rockchip_clk_register_pll()
1168 if (!pll->rate_table) in rockchip_clk_register_pll()
1176 if (!pll->rate_table) in rockchip_clk_register_pll()
1187 pll->hw.init = &init; in rockchip_clk_register_pll()
1188 pll->type = pll_type; in rockchip_clk_register_pll()
1194 pll->ctx = ctx; in rockchip_clk_register_pll()
[all …]
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| /linux-6.15/drivers/clk/sophgo/ |
| H A D | clk-cv18xx-pll.c | 39 value = readl(pll->common.base + pll->pll_reg); in ipll_recalc_rate()
144 regval = readl(pll->common.base + pll->pll_reg); in ipll_set_rate()
147 writel(regval, pll->common.base + pll->pll_reg); in ipll_set_rate()
161 return cv1800_clk_clearbit(&pll->common, &pll->pll_pwd); in pll_enable()
168 cv1800_clk_setbit(&pll->common, &pll->pll_pwd); in pll_disable()
231 syn_set = readl(pll->common.base + pll->pll_syn->set); in fpll_recalc_rate()
239 value = readl(pll->common.base + pll->pll_reg); in fpll_recalc_rate()
363 fpll_find_rate(pll, &pll->pll_limit[2], parent_rate, in fpll_set_rate()
373 regval = readl(pll->common.base + pll->pll_reg); in fpll_set_rate()
376 writel(regval, pll->common.base + pll->pll_reg); in fpll_set_rate()
[all …]
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| /linux-6.15/drivers/clk/pistachio/ |
| H A D | clk-pll.c | 135 if (pll->rates[i].fref == fref && pll->rates[i].fout == fout) in pll_get_params()
171 pll_lock(pll); in pll_gf40lp_frac_enable()
264 pll_lock(pll); in pll_gf40lp_frac_set_rate()
328 pll_lock(pll); in pll_gf40lp_laint_enable()
404 pll_lock(pll); in pll_gf40lp_laint_set_rate()
456 pll = kzalloc(sizeof(*pll), GFP_KERNEL); in pll_register()
457 if (!pll) in pll_register()
480 kfree(pll); in pll_register()
491 kfree(pll); in pll_register()
504 clk = pll_register(pll[i].name, pll[i].parent, in pistachio_clk_register_pll()
[all …]
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| /linux-6.15/drivers/clk/samsung/ |
| H A D | clk-pll.c | 125 return samsung_pll_lock_wait(pll, BIT(pll->lock_offs)); in samsung_pll3xxx_enable()
278 pll->lock_reg); in samsung_pll35xx_set_rate()
281 pll->lock_reg); in samsung_pll35xx_set_rate()
294 return samsung_pll_lock_wait(pll, BIT(pll->lock_offs)); in samsung_pll35xx_set_rate()
406 return samsung_pll_lock_wait(pll, BIT(pll->lock_offs)); in samsung_pll36xx_set_rate()
503 pll->lock_reg); in samsung_pll0822x_set_rate()
510 return samsung_pll_lock_wait(pll, BIT(pll->lock_offs)); in samsung_pll0822x_set_rate()
607 return samsung_pll_lock_wait(pll, BIT(pll->lock_offs)); in samsung_pll0831x_set_rate()
1335 pll = kzalloc(sizeof(*pll), GFP_KERNEL); in _samsung_clk_register_pll()
1336 if (!pll) { in _samsung_clk_register_pll()
[all …]
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| /linux-6.15/drivers/clk/baikal-t1/ |
| H A D | ccu-pll.c | 97 regmap_update_bits(pll->sys_regs, pll->reg_ctl, in ccu_pll_reset()
117 regmap_read(pll->sys_regs, pll->reg_ctl, &val); in ccu_pll_enable()
147 regmap_read(pll->sys_regs, pll->reg_ctl, &val); in ccu_pll_is_enabled()
159 regmap_read(pll->sys_regs, pll->reg_ctl, &val); in ccu_pll_recalc_rate()
372 struct ccu_pll *pll = bit->pll; in ccu_pll_dbgfs_bit_set() local
386 struct ccu_pll *pll = fld->pll; in ccu_pll_dbgfs_fld_set() local
414 struct ccu_pll *pll = bit->pll; in ccu_pll_dbgfs_bit_get() local
428 struct ccu_pll *pll = fld->pll; in ccu_pll_dbgfs_fld_get() local
452 bits[idx].pll = pll; in ccu_pll_debug_init()
465 flds[idx].pll = pll; in ccu_pll_debug_init()
[all …]
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| /linux-6.15/drivers/gpu/drm/omapdrm/dss/ |
| H A D | hdmi_pll.c | 41 struct hdmi_pll_data *pll = container_of(dsspll, struct hdmi_pll_data, pll); in hdmi_pll_enable() local
59 struct hdmi_pll_data *pll = container_of(dsspll, struct hdmi_pll_data, pll); in hdmi_pll_disable() local
132 struct dss_pll *pll = &hpll->pll; in hdmi_init_pll_data() local
142 pll->name = "hdmi"; in hdmi_init_pll_data()
143 pll->id = DSS_PLL_HDMI; in hdmi_init_pll_data()
144 pll->base = hpll->base; in hdmi_init_pll_data()
145 pll->clkin = clk; in hdmi_init_pll_data()
166 pll->pdev = pdev; in hdmi_pll_init()
167 pll->wp = wp; in hdmi_pll_init()
170 if (IS_ERR(pll->base)) in hdmi_pll_init()
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| /linux-6.15/drivers/clk/mmp/ |
| H A D | clk-pll.c | 35 if ((val & pll->enable) == pll->enable) in mmp_clk_pll_is_enabled()
54 if ((val & pll->enable) != pll->enable) in mmp_clk_pll_recalc_rate()
57 if (pll->reg) { in mmp_clk_pll_recalc_rate()
66 if (pll->postdiv_reg) { in mmp_clk_pll_recalc_rate()
111 pll = kzalloc(sizeof(*pll), GFP_KERNEL); in mmp_clk_register_pll()
112 if (!pll) in mmp_clk_register_pll()
123 pll->enable = enable; in mmp_clk_register_pll()
124 pll->reg = reg; in mmp_clk_register_pll()
125 pll->shift = shift; in mmp_clk_register_pll()
131 pll->hw.init = &init; in mmp_clk_register_pll()
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