| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/ |
| H A D | dml2_dc_resource_mgmt.c | 799 int plane_idx) in get_target_mpc_factor() argument 964 int plane_idx; in unmap_dc_pipes_for_stream() local 967 for (plane_idx = 0; plane_idx < status->plane_count; plane_idx++) in unmap_dc_pipes_for_stream() 968 if (mpc_factors[plane_idx].target < mpc_factors[plane_idx].source) in unmap_dc_pipes_for_stream() 973 status->plane_states[plane_idx], in unmap_dc_pipes_for_stream() 974 mpc_factors[plane_idx].target); in unmap_dc_pipes_for_stream() 993 int plane_idx; in map_dc_pipes_for_stream() local 996 for (plane_idx = 0; plane_idx < status->plane_count; plane_idx++) in map_dc_pipes_for_stream() 997 if (mpc_factors[plane_idx].target > mpc_factors[plane_idx].source) in map_dc_pipes_for_stream() 1002 status->plane_states[plane_idx], in map_dc_pipes_for_stream() [all …]
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| H A D | dml_display_rq_dlg_calc.c | 43 dml_uint_t plane_idx = dml_get_plane_idx(mode_lib, pipe_idx); in dml_rq_dlg_get_rq_reg() local 202 dml_uint_t plane_idx = dml_get_plane_idx(mode_lib, pipe_idx); in dml_rq_dlg_get_dlg_reg() local 208 dml_uint_t num_cursors = plane->NumberOfCursors[plane_idx]; in dml_rq_dlg_get_dlg_reg() 209 enum dml_odm_mode odm_mode = hw->ODMMode[plane_idx]; in dml_rq_dlg_get_dlg_reg() 211 dml_uint_t htotal = timing->HTotal[plane_idx]; in dml_rq_dlg_get_dlg_reg() 212 dml_uint_t hactive = timing->HActive[plane_idx]; in dml_rq_dlg_get_dlg_reg() 213 dml_uint_t hblank_end = timing->HBlankEnd[plane_idx]; in dml_rq_dlg_get_dlg_reg() 214 dml_uint_t vblank_end = timing->VBlankEnd[plane_idx]; in dml_rq_dlg_get_dlg_reg() 215 dml_bool_t interlaced = timing->Interlace[plane_idx]; in dml_rq_dlg_get_dlg_reg() 270 dml_print("DML_DLG::%s: plane_idx = %d\n", __func__, plane_idx); in dml_rq_dlg_get_dlg_reg() [all …]
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| H A D | display_mode_util.c | 759 dml_uint_t plane_idx = mode_lib->mp.pipe_plane[pipe_idx]; in dml_get_plane_idx() local 760 return plane_idx; in dml_get_plane_idx() 763 dml_uint_t dml_get_pipe_idx(const struct display_mode_lib_st *mode_lib, dml_uint_t plane_idx) in dml_get_pipe_idx() argument 768 ASSERT(plane_idx < __DML_NUM_PLANES__); in dml_get_pipe_idx() 771 if (plane_idx == mode_lib->mp.pipe_plane[i]) { in dml_get_pipe_idx() 790 for (dml_uint_t plane_idx = 0; plane_idx < __DML_NUM_PLANES__; plane_idx++) { in dml_calc_pipe_plane_mapping() local 791 for (dml_uint_t i = 0; i < hw->DPPPerSurface[plane_idx]; i++) { in dml_calc_pipe_plane_mapping() 792 pipe_plane[pipe_idx] = plane_idx; in dml_calc_pipe_plane_mapping()
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| H A D | display_mode_util.h | 72 …RT__ dml_uint_t dml_get_pipe_idx(const struct display_mode_lib_st *mode_lib, dml_uint_t plane_idx);
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| H A D | display_mode_core.c | 6172 dml_uint_t plane_idx, in CalculateMaxVStartup() argument 6182 dml_float_t line_time_us = (dml_float_t) timing->HTotal[plane_idx] / timing->PixelClock[plane_idx]; in CalculateMaxVStartup() 6183 dml_uint_t vblank_actual = timing->VTotal[plane_idx] - timing->VActive[plane_idx]; in CalculateMaxVStartup() 6186 timing->PixelClock[plane_idx]); in CalculateMaxVStartup() 6194 timing->VTotal[plane_idx] - timing->VActive[plane_idx] - timing->VFrontPorch[plane_idx] + 2); in CalculateMaxVStartup() 6201 if (timing->Interlace[plane_idx] && !ptoi_supported) in CalculateMaxVStartup() 6206 dml_print("DML::%s: plane_idx = %u\n", __func__, plane_idx); in CalculateMaxVStartup() 10203 dml_uint_t plane_idx = mode_lib->mp.pipe_plane[pipe_idx]; in dml_get_is_phantom_pipe() local 10210 dml_uint_t plane_idx; \ 10211 plane_idx = mode_lib->mp.pipe_plane[surface_idx]; \ [all …]
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| H A D | dml2_core_utils.c | 407 for (unsigned int plane_idx = 0; plane_idx < DML2_MAX_PLANES; plane_idx++) { in dml2_core_utils_pipe_plane_mapping() local 408 for (int i = 0; i < cfg_support_info->plane_support_info[plane_idx].dpps_used; i++) { in dml2_core_utils_pipe_plane_mapping() 409 pipe_plane[pipe_idx] = plane_idx; in dml2_core_utils_pipe_plane_mapping()
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| H A D | dml2_core_dcn4_calcs.c | 229 for (unsigned int plane_idx = 0; plane_idx < DML2_MAX_PLANES; plane_idx++) { in dml_calc_pipe_plane_mapping() local 231 pipe_plane[pipe_idx] = plane_idx; in dml_calc_pipe_plane_mapping() 260 unsigned int plane_idx; \ 261 plane_idx = mode_lib->mp.pipe_plane[pipe_idx]; \ 262 return (type) interval_var[plane_idx]; \ 284 return (type) interval_var[plane_idx]; \ 301 return (type) interval_var[plane_idx][array_idx]; \ 12213 return plane_idx; in dml_get_plane_idx() 12417 DML2_ASSERT(l->plane_idx < DML2_MAX_PLANES); in rq_dlg_get_dlg_reg() 12431 if (l->plane_idx < DML2_MAX_PLANES) { in rq_dlg_get_dlg_reg() [all …]
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| H A D | dml2_core_shared_types.h | 1418 unsigned int plane_idx; member
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| /linux-6.15/drivers/gpu/drm/mediatek/ |
| H A D | mtk_plane.c | 324 const u32 *formats, size_t num_formats, unsigned int plane_idx) in mtk_plane_init() argument 351 err = drm_plane_create_zpos_immutable_property(plane, plane_idx); in mtk_plane_init() 353 DRM_ERROR("Failed to create zpos property for plane %u\n", plane_idx); in mtk_plane_init()
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| H A D | mtk_plane.h | 52 const u32 *formats, size_t num_formats, unsigned int plane_idx);
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| H A D | mtk_crtc.c | 905 enum drm_plane_type mtk_crtc_plane_type(unsigned int plane_idx, in mtk_crtc_plane_type() argument 908 if (plane_idx == 0) in mtk_crtc_plane_type() 910 else if (plane_idx == (num_planes - 1)) in mtk_crtc_plane_type()
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_vba.c | 256 static unsigned int get_pipe_idx(struct display_mode_lib *mode_lib, unsigned int plane_idx) in get_pipe_idx() argument 261 ASSERT(plane_idx < DC__NUM_DPP__MAX); in get_pipe_idx() 264 if (plane_idx == mode_lib->vba.pipe_plane[i]) { in get_pipe_idx() 278 unsigned int plane_idx; in get_det_buffer_size_kbytes() local 282 plane_idx = mode_lib->vba.pipe_plane[pipe_idx]; in get_det_buffer_size_kbytes() 284 …int("DML::%s: num_pipes=%d pipe_idx=%d plane_idx=%0d\n", __func__, num_pipes, pipe_idx, plane_idx); in get_det_buffer_size_kbytes() 285 det_buf_size_kbytes = mode_lib->vba.DETBufferSizeInKByte[plane_idx]; // per hubp DET buffer size in get_det_buffer_size_kbytes() 295 unsigned int plane_idx; in get_is_phantom_pipe() local 298 plane_idx = mode_lib->vba.pipe_plane[pipe_idx]; in get_is_phantom_pipe() 300 mode_lib->vba.UsesMALLForPStateChange[plane_idx]); in get_is_phantom_pipe() [all …]
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| /linux-6.15/drivers/video/fbdev/omap/ |
| H A D | omapfb.h | 134 int plane_idx; member
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| H A D | omapfb_main.c | 950 if ((unsigned)omapfb_nb->plane_idx >= OMAPFB_PLANE_NUM) in omapfb_register_client() 962 &omapfb_client_list[omapfb_nb->plane_idx], in omapfb_register_client() 978 &omapfb_client_list[omapfb_nb->plane_idx], &omapfb_nb->nb); in omapfb_unregister_client()
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| /linux-6.15/drivers/media/test-drivers/vicodec/ |
| H A D | vicodec-core.c | 169 int plane_idx; in copy_cap_to_ref() local 174 for (plane_idx = 0; plane_idx < info->planes_num; plane_idx++) { in copy_cap_to_ref() 176 unsigned int h_div = (plane_idx == 1 || plane_idx == 2) ? in copy_cap_to_ref() 181 if (info->planes_num == 3 && plane_idx == 1) { in copy_cap_to_ref() 186 if (plane_idx == 1 && in copy_cap_to_ref()
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_resource.c | 2331 if (slice_idx == 0 && plane_idx == 0 && is_primary) { in resource_log_pipe() 2334 plane_idx, slice_idx, stream_idx); in resource_log_pipe() 2339 } else if (slice_idx == 0 && plane_idx == -1) { in resource_log_pipe() 2350 plane_idx, slice_idx); in resource_log_pipe() 2354 } else if (slice_idx != 0 && plane_idx == -1) { in resource_log_pipe() 2362 DC_LOG_DC(" | plane%d | |", plane_idx); in resource_log_pipe() 2367 DC_LOG_DC(" | plane%d | | |", plane_idx); in resource_log_pipe() 2386 plane_idx = -1; in resource_log_pipe_for_stream() 2396 plane_idx++; in resource_log_pipe_for_stream() 2399 plane_idx, slice_count, in resource_log_pipe_for_stream() [all …]
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