Searched refs:pipelined (Results 1 – 7 of 7) sorted by relevance
47 #define pipelined 0 macro91 if (!pipelined) { in i965_write_fence_reg()138 if (!pipelined) { in i915_write_fence_reg()163 if (!pipelined) { in i830_write_fence_reg()
16 operations in single, dual or quad IO mode with pipelined ECC
17 in single, dual or quad IO mode with pipelined ECC encoding/decoding
121 deeply pipelined behind other VM_BIND operations and workloads140 buffers. The workload execution can then easily be pipelined behind
48 synchronous pipelined devices, where the address
740 is implemented as a SPI-MEM controller with pipelined ECC
1051 …In the case of pipelined CCBs, a page overflow error will be triggered if the output from the pipe…