| /linux-6.15/drivers/media/cec/core/ |
| H A D | cec-pin.c | 330 pin->rx_bit = pin->tx_bit = 0; in cec_pin_to_idle() 481 if (pin->tx_bit / 10 >= pin->tx_msg.len + pin->tx_extra_bytes) { in cec_pin_tx_states() 582 pin->rx_bit = pin->tx_bit; in cec_pin_tx_states() 819 pin->work_rx_msg = pin->rx_msg; in cec_pin_rx_states() 1035 struct cec_pin *pin = adap->pin; in cec_pin_thread_func() local 1133 struct cec_pin *pin = adap->pin; in cec_pin_adap_enable() local 1168 struct cec_pin *pin = adap->pin; in cec_pin_adap_log_addr() local 1189 struct cec_pin *pin = adap->pin; in cec_pin_adap_transmit() local 1220 struct cec_pin *pin = adap->pin; in cec_pin_adap_status() local 1286 struct cec_pin *pin = adap->pin; in cec_pin_adap_monitor_all_enable() local [all …]
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| /linux-6.15/arch/arm/boot/dts/microchip/ |
| H A D | sama5d3_lcd.dtsi | 60 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ 61 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ 62 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ 63 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ 64 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ 65 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ 66 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ 67 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ 68 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ 69 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ [all …]
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| H A D | at91sam9x5_lcd.dtsi | 63 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ 64 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ 65 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ 66 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ 67 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ 68 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ 69 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ 70 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ 71 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ 72 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ [all …]
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| /linux-6.15/drivers/pinctrl/renesas/ |
| H A D | pinctrl-rza1.c | 83 u8 pin: 4; member 100 u16 pin: 4; member 127 { .pin = 0, .func = 1 }, 128 { .pin = 1, .func = 1 }, 129 { .pin = 2, .func = 1 }, 130 { .pin = 3, .func = 1 }, 131 { .pin = 4, .func = 1 }, 447 u8 pin; member 514 if (bidir_pin->pin == pin && bidir_pin->func == func) in rza1_pinmux_get_bidir() 532 if (swio_pin->port == port && swio_pin->pin == pin && in rza1_pinmux_get_swio() [all …]
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| /linux-6.15/arch/arm64/boot/dts/exynos/ |
| H A D | exynos8895-pinctrl.dtsi | 3 * Samsung's Exynos 8895 SoC pin-mux and pin-config device tree source 96 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 104 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 110 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 134 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 135 samsung,pin-drv = <EXYNOS7_PIN_DRV_LV1>; 142 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 143 samsung,pin-drv = <EXYNOS7_PIN_DRV_LV1>; 216 samsung,pin-drv = <EXYNOS7_PIN_DRV_LV4>; 224 samsung,pin-drv = <EXYNOS7_PIN_DRV_LV2>; [all …]
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| H A D | exynosautov9-pinctrl.dtsi | 3 * Samsung's ExynosAutov9 SoC pin-mux and pin-config device tree source 7 * Samsung's ExynosAutov9 SoC pin-mux and pin-config options are listed as 42 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 47 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 61 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 67 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 107 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; 113 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; 119 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; 221 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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| H A D | exynos990-pinctrl.dtsi | 3 * Samsung Exynos 990 pin-mux and pin-config device tree source 102 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 109 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 118 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 123 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 129 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 135 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 150 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; 674 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 1519 samsung,pin-function = <0xf>; [all …]
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| H A D | exynos7885-pinctrl.dtsi | 3 * Samsung Exynos7885 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos7885 SoC pin-mux and pin-config options are listed as 85 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 91 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 98 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 106 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 267 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 281 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 689 samsung,pin-val = <1>; 709 samsung,pin-val = <1>; [all …]
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| H A D | exynosautov920-pinctrl.dtsi | 3 * Samsung's ExynosAutov920 SoC pin-mux and pin-config device tree source 7 * Samsung's ExynosAutov920 SoC pin-mux and pin-config options are listed as 183 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 190 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 197 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 204 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 294 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 300 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 306 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 312 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; [all …]
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| H A D | exynos5433-pinctrl.dtsi | 3 * Samsung's Exynos5433 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5433 SoC pin-mux and pin-config options are listed as device 15 pin- ## _pin { \ 195 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 202 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 287 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 294 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 301 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 322 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 329 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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| H A D | exynos7-pinctrl.dtsi | 3 * Samsung's Exynos7 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos7 SoC pin-mux and pin-config options are listed as 190 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 191 samsung,pin-drv = <EXYNOS7_PIN_DRV_LV1>; 197 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 198 samsung,pin-drv = <EXYNOS7_PIN_DRV_LV1>; 204 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 232 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 253 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 260 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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| H A D | exynos850-pinctrl.dtsi | 3 * Samsung's Exynos850 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos850 SoC pin-mux and pin-config options are listed as device 109 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 117 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 125 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 132 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 221 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 251 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 363 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 370 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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| /linux-6.15/arch/arm/boot/dts/samsung/ |
| H A D | s5pv210-pinctrl.dtsi | 11 * Samsung's S5PV210 SoC pin banks, pin-mux and pin-config options are 18 pin- ## _pin { \ 281 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>; 288 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>; 295 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>; 302 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>; 309 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>; 316 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>; 323 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>; 330 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>; [all …]
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| H A D | exynos4x12-pinctrl.dtsi | 3 * Samsung's Exynos4x12 SoCs pin-mux and pin-config device tree source 8 * Samsung's Exynos4x12 SoCs pin-mux and pin-config options are listed as device 15 pin- ## _pin { \ 130 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 137 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 144 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 151 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 157 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 185 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 206 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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| H A D | exynos4210-pinctrl.dtsi | 3 * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source 10 * Samsung's Exynos4210 SoC pin-mux and pin-config options are listed as device 149 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 156 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 163 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 170 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 176 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 204 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 225 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 232 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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| H A D | exynos5420-pinctrl.dtsi | 3 * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed as device 64 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 71 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 177 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 184 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 191 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 198 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 226 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 233 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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| H A D | exynos5250-pinctrl.dtsi | 3 * Samsung's Exynos5250 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5250 SoC pin-mux and pin-config options are listed as device 204 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 211 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 217 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 224 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 251 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 258 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 272 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 279 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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| H A D | exynos3250-pinctrl.dtsi | 3 * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source 8 * Samsung's Exynos3250 SoCs pin-mux and pin-config options are listed as device 15 pin- ## _pin { \ 23 pin- ## _pin { \ 90 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 97 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 104 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 117 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 131 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 138 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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| H A D | s3c64xx-pinctrl.dtsi | 4 * - pin control-related definitions 8 * Samsung's S3C64xx SoCs pin banks, pin-mux and pin-config options are 137 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; 143 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; 149 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; 203 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; 210 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; 216 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; 228 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; 264 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; [all …]
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| H A D | exynos5260-pinctrl.dtsi | 3 * Samsung's Exynos5260 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5260 SoC pin-mux and pin-config options are listed as device 237 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 244 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 281 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 288 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 295 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 302 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 309 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 316 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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| H A D | exynos5410-pinctrl.dtsi | 3 * Exynos5410 SoC pin-mux and pin-config device tree source 311 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 332 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 346 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 353 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 360 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 395 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 402 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 647 samsung,pin-function = <2>; 648 samsung,pin-pud = <0>; [all …]
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| /linux-6.15/arch/arm64/boot/dts/exynos/google/ |
| H A D | gs101-pinctrl.dtsi | 3 * GS101 SoC pin-mux and pin-config device tree source 121 samsung,pin-pud = <GS101_PIN_PULL_NONE>; 127 samsung,pin-pud = <GS101_PIN_PULL_NONE>; 133 samsung,pin-pud = <GS101_PIN_PULL_NONE>; 139 samsung,pin-pud = <GS101_PIN_PULL_NONE>; 146 samsung,pin-pud = <GS101_PIN_PULL_NONE>; 257 samsung,pin-pud = <GS101_PIN_PULL_UP>; 303 samsung,pin-pud = <GS101_PIN_PULL_UP>; 310 samsung,pin-pud = <GS101_PIN_PULL_UP>; 317 samsung,pin-pud = <GS101_PIN_PULL_UP>; [all …]
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| /linux-6.15/drivers/pinctrl/qcom/ |
| H A D | pinctrl-ssbi-mpp.c | 178 if (pin->dtest) { in pm8xxx_mpp_update() 181 } else if (pin->input && pin->output) { in pm8xxx_mpp_update() 183 if (pin->high_z) in pm8xxx_mpp_update() 193 if (pin->dtest) in pm8xxx_mpp_update() 200 if (pin->paired) in pm8xxx_mpp_update() 211 if (pin->paired) in pm8xxx_mpp_update() 221 if (pin->dtest) { in pm8xxx_mpp_update() 227 if (pin->paired) in pm8xxx_mpp_update() 353 arg = pin->amux; in pm8xxx_pin_config_get() 500 if (!pin->input) in pm8xxx_mpp_get() [all …]
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| H A D | pinctrl-ssbi-gpio.c | 276 if (!pin->disable) in pm8xxx_pin_config_get() 298 if (pin->open_drain) in pm8xxx_pin_config_get() 337 pin->disable = 0; in pm8xxx_pin_config_set() 343 pin->disable = 0; in pm8xxx_pin_config_set() 354 pin->bias = pin->pull_up_strength; in pm8xxx_pin_config_set() 356 pin->disable = 0; in pm8xxx_pin_config_set() 360 pin->disable = 1; in pm8xxx_pin_config_set() 431 if (!pin->inverted) in pm8xxx_pin_config_set() 565 if (pin->disable) { in pm8xxx_gpio_dbg_show_one() 575 if (pin->inverted) in pm8xxx_gpio_dbg_show_one() [all …]
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| /linux-6.15/drivers/pinctrl/aspeed/ |
| H A D | pinmux-aspeed.h | 652 #define PIN_EXPRS_SYM(pin) pin_exprs_ ## pin argument 653 #define PIN_EXPRS_PTR(pin) (&PIN_EXPRS_SYM(pin)[0]) argument 654 #define PIN_SYM(pin) pin_ ## pin argument 660 { #pin, PIN_EXPRS_PTR(pin) } 677 PIN_DECL_(pin, SIG_EXPR_LIST_PTR(pin, sig), \ 695 PIN_DECL_(pin, SIG_EXPR_LIST_PTR(pin, sig), \ 697 FUNC_GROUP_DECL(sig, pin) 719 PIN_DECL_(pin, \ 726 PIN_DECL_(pin, \ 734 PIN_DECL_(pin, \ [all …]
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