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Searched refs:phyclk_mhz (Results 1 – 25 of 27) sorted by relevance

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/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c127 .phyclk_mhz = 600.0,
136 .phyclk_mhz = 810.0,
145 .phyclk_mhz = 810.0,
154 .phyclk_mhz = 810.0,
163 .phyclk_mhz = 810.0,
371 .phyclk_mhz = 600.0,
380 .phyclk_mhz = 810.0,
389 .phyclk_mhz = 810.0,
398 .phyclk_mhz = 810.0,
648 s[i].phyclk_mhz = dcn3_1_soc.clock_limits[closest_clk_lvl].phyclk_mhz; in dcn31_update_bw_bounding_box()
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn351/
H A Ddcn351_fpu.c107 .phyclk_mhz = 600.0,
120 .phyclk_mhz = 810.0,
133 .phyclk_mhz = 810.0,
146 .phyclk_mhz = 810.0,
159 .phyclk_mhz = 810.0,
172 .phyclk_mhz = 810.0,
185 .phyclk_mhz = 810.0,
198 .phyclk_mhz = 810.0,
343 clock_limits[i].phyclk_mhz = in dcn351_update_bw_bounding_box_fpu()
344 dcn3_51_soc.clock_limits[closest_clk_lvl].phyclk_mhz; in dcn351_update_bw_bounding_box_fpu()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddcn314_fpu.c108 .phyclk_mhz = 600.0,
117 .phyclk_mhz = 810.0,
126 .phyclk_mhz = 810.0,
135 .phyclk_mhz = 810.0,
144 .phyclk_mhz = 810.0,
254 clock_limits[i].phyclk_mhz = dcn3_14_soc.clock_limits[closest_clk_lvl].phyclk_mhz; in dcn314_update_bw_bounding_box_fpu()
/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_clk_mgr.c263 .phyclk_mhz = 810,
271 .phyclk_mhz = 810,
279 .phyclk_mhz = 810,
287 .phyclk_mhz = 810,
295 .phyclk_mhz = 810,
508 bw_params->clk_table.entries[i].phyclk_mhz = bw_params->clk_table.entries[j].phyclk_mhz; in dcn315_clk_mgr_helper_populate_bw_params()
556 if (!bw_params->clk_table.entries[i].phyclk_mhz) in dcn315_clk_mgr_helper_populate_bw_params()
557 bw_params->clk_table.entries[i].phyclk_mhz = def_max.phyclk_mhz; in dcn315_clk_mgr_helper_populate_bw_params()
565 ASSERT(bw_params->clk_table.entries[i-1].phyclk_mhz == def_max.phyclk_mhz); in dcn315_clk_mgr_helper_populate_bw_params()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn301/
H A Ddcn301_fpu.c123 .phyclk_mhz = 600.0,
135 .phyclk_mhz = 600.0,
147 .phyclk_mhz = 810.0,
159 .phyclk_mhz = 810.0,
171 .phyclk_mhz = 810.0,
364 s[i].phyclk_mhz = dcn3_01_soc.clock_limits[closest_clk_lvl].phyclk_mhz; in dcn301_fpu_update_bw_bounding_box()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn302/
H A Ddcn302_fpu.c119 .phyclk_mhz = 300.0,
230 if (bw_params->clk_table.entries[i].phyclk_mhz > max_phyclk_mhz) in dcn302_fpu_update_bw_bounding_box()
231 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in dcn302_fpu_update_bw_bounding_box()
240 max_phyclk_mhz = dcn3_02_soc.clock_limits[0].phyclk_mhz; in dcn302_fpu_update_bw_bounding_box()
327 dcn3_02_soc.clock_limits[i].phyclk_mhz = max_phyclk_mhz; in dcn302_fpu_update_bw_bounding_box()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn321/
H A Ddcn321_fpu.c113 .phyclk_mhz = 810.0,
375 if (bw_params->clk_table.entries[i].phyclk_mhz > max_clk_data.phyclk_mhz) in build_synthetic_soc_states()
376 max_clk_data.phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in build_synthetic_soc_states()
421 if (max_clk_data.phyclk_mhz == 0) in build_synthetic_soc_states()
422 max_clk_data.phyclk_mhz = dcn3_21_soc.clock_limits[0].phyclk_mhz; in build_synthetic_soc_states()
429 entry.phyclk_mhz = max_clk_data.phyclk_mhz; in build_synthetic_soc_states()
728 if (bw_params->clk_table.entries[i].phyclk_mhz > max_phyclk_mhz) in dcn321_update_bw_bounding_box_fpu()
729 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in dcn321_update_bw_bounding_box_fpu()
738 max_phyclk_mhz = dcn3_21_soc.clock_limits[0].phyclk_mhz; in dcn321_update_bw_bounding_box_fpu()
825 dcn3_21_soc.clock_limits[i].phyclk_mhz = max_phyclk_mhz; in dcn321_update_bw_bounding_box_fpu()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c230 .phyclk_mhz = 540.0,
241 .phyclk_mhz = 600.0,
252 .phyclk_mhz = 810.0,
263 .phyclk_mhz = 810.0,
452 .phyclk_mhz = 540.0,
463 .phyclk_mhz = 600.0,
474 .phyclk_mhz = 810.0,
485 .phyclk_mhz = 810.0,
496 .phyclk_mhz = 810.0,
507 .phyclk_mhz = 810.0,
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn303/
H A Ddcn303_fpu.c118 .phyclk_mhz = 300.0,
226 if (bw_params->clk_table.entries[i].phyclk_mhz > max_phyclk_mhz) in dcn303_fpu_update_bw_bounding_box()
227 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in dcn303_fpu_update_bw_bounding_box()
236 max_phyclk_mhz = dcn3_03_soc.clock_limits[0].phyclk_mhz; in dcn303_fpu_update_bw_bounding_box()
333 dcn3_03_soc.clock_limits[i].phyclk_mhz = max_phyclk_mhz; in dcn303_fpu_update_bw_bounding_box()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn35/
H A Ddcn35_fpu.c124 .phyclk_mhz = 600.0,
133 .phyclk_mhz = 810.0,
142 .phyclk_mhz = 810.0,
151 .phyclk_mhz = 810.0,
160 .phyclk_mhz = 810.0,
309 clock_limits[i].phyclk_mhz = in dcn35_update_bw_bounding_box_fpu()
310 dcn3_5_soc.clock_limits[closest_clk_lvl].phyclk_mhz; in dcn35_update_bw_bounding_box_fpu()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_policy.c149 if (p->in_states->state_array[i].phyclk_mhz > max_phyclk_mhz) in dml2_policy_build_synthetic_soc_states()
150 max_phyclk_mhz = (int)p->in_states->state_array[i].phyclk_mhz; in dml2_policy_build_synthetic_soc_states()
170 s->entry.phyclk_mhz = max_phyclk_mhz; in dml2_policy_build_synthetic_soc_states()
173 s->entry.phyclk_mhz = max_phyclk_mhz; in dml2_policy_build_synthetic_soc_states()
H A Ddml2_translation_helper.c361 p->in_states->state_array[0].phyclk_mhz = 810; in dml2_init_soc_states()
397 p->in_states->state_array[0].phyclk_mhz = 810; in dml2_init_soc_states()
432 p->in_states->state_array[0].phyclk_mhz = 810; in dml2_init_soc_states()
578 if (p->in_states->state_array[i].phyclk_mhz > max_phyclk_mhz) in dml2_init_soc_states()
579 max_phyclk_mhz = (int)p->in_states->state_array[i].phyclk_mhz; in dml2_init_soc_states()
591 p->out_states->state_array[i].phyclk_mhz = max_phyclk_mhz; in dml2_init_soc_states()
594 p->out_states->state_array[i].phyclk_mhz = max_phyclk_mhz; in dml2_init_soc_states()
729 out->state_array[i].phyclk_mhz = dc->dml.soc.clock_limits[i].phyclk_mhz; in dml2_translate_soc_states()
H A Ddml2_wrapper.c595 …_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].phyclk_mhz * 1000; in dml2_validate_and_build_resource()
653 …_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].phyclk_mhz * 1000; in dml2_validate_and_build_resource()
H A Ddisplay_mode_util.c625 dml_print("DML: state_bbox: phyclk_mhz = %f\n", state->phyclk_mhz); in dml_print_soc_state_bounding_box()
H A Ddisplay_mode_core_structs.h281 dml_float_t phyclk_mhz; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_clk_mgr.c667 bw_params->clk_table.entries[i].phyclk_mhz = bw_params->clk_table.entries[j].phyclk_mhz; in dcn314_clk_mgr_helper_populate_bw_params()
706 bw_params->clk_table.entries[i].phyclk_mhz = def_max.phyclk_mhz; in dcn314_clk_mgr_helper_populate_bw_params()
728 if (!bw_params->clk_table.entries[i].phyclk_mhz) in dcn314_clk_mgr_helper_populate_bw_params()
729 bw_params->clk_table.entries[i].phyclk_mhz = def_max.phyclk_mhz; in dcn314_clk_mgr_helper_populate_bw_params()
/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_socbb.h34 uint32_t phyclk_mhz; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn201/
H A Ddcn201_resource.c147 .phyclk_mhz = 810.0,
158 .phyclk_mhz = 810.0,
169 .phyclk_mhz = 810.0,
180 .phyclk_mhz = 810.0,
192 .phyclk_mhz = 810.0,
/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_clk_mgr.c964 bw_params->clk_table.entries[i].phyclk_mhz = bw_params->clk_table.entries[j].phyclk_mhz; in dcn35_clk_mgr_helper_populate_bw_params()
1012 bw_params->clk_table.entries[i].phyclk_mhz = def_max.phyclk_mhz; in dcn35_clk_mgr_helper_populate_bw_params()
1042 if (!bw_params->clk_table.entries[i].phyclk_mhz) in dcn35_clk_mgr_helper_populate_bw_params()
1043 bw_params->clk_table.entries[i].phyclk_mhz = def_max.phyclk_mhz; in dcn35_clk_mgr_helper_populate_bw_params()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c134 .phyclk_mhz = 810.0,
2682 if (bw_params->clk_table.entries[i].phyclk_mhz > max_phyclk_mhz) in dcn32_patch_dpm_table()
2683 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in dcn32_patch_dpm_table()
2828 if (bw_params->clk_table.entries[i].phyclk_mhz > max_clk_data.phyclk_mhz) in build_synthetic_soc_states()
2829 max_clk_data.phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in build_synthetic_soc_states()
2874 if (max_clk_data.phyclk_mhz == 0) in build_synthetic_soc_states()
2875 max_clk_data.phyclk_mhz = dcn3_2_soc.clock_limits[0].phyclk_mhz; in build_synthetic_soc_states()
2882 entry.phyclk_mhz = max_clk_data.phyclk_mhz; in build_synthetic_soc_states()
3172 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in dcn32_update_bw_bounding_box_fpu()
3183 max_phyclk_mhz = dcn3_2_soc.clock_limits[0].phyclk_mhz; in dcn32_update_bw_bounding_box_fpu()
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dclk_mgr.h113 unsigned int phyclk_mhz; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30_clk_mgr.c160 &clk_mgr_base->bw_params->clk_table.entries[0].phyclk_mhz, in dcn3_init_clocks()
468 unsigned int i, max_phyclk_req = clk_mgr_base->bw_params->clk_table.entries[0].phyclk_mhz * 1000; in dcn30_notify_link_rate_change()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddcn30_fpu.c131 .phyclk_mhz = 300.0,
540 dcn30_bb_max_clk->max_phyclk_mhz = dcn3_0_soc.clock_limits[0].phyclk_mhz; in dcn30_fpu_update_max_clk()
589 dcn3_0_soc.clock_limits[i].phyclk_mhz = dcn30_bb_max_clk->max_phyclk_mhz; in dcn30_fpu_update_bw_bounding_box()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_structs.h167 double phyclk_mhz; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn30/
H A Ddcn30_resource.c2134 if (bw_params->clk_table.entries[i].phyclk_mhz > dcn30_bb_max_clk.max_phyclk_mhz) in dcn30_update_bw_bounding_box()
2135 dcn30_bb_max_clk.max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in dcn30_update_bw_bounding_box()

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