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Searched refs:phy_read_mmd (Results 1 – 25 of 42) sorted by relevance

12

/linux-6.15/drivers/net/phy/
H A Dphy-c45.c41 stat1 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_STAT1); in genphy_c45_pma_can_sleep()
371 ret = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in genphy_c45_check_and_restart_aneg()
405 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in genphy_c45_aneg_done()
426 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); in genphy_c45_read_link()
449 val = phy_read_mmd(phydev, devad, MDIO_STAT1); in genphy_c45_read_link()
456 val = phy_read_mmd(phydev, devad, MDIO_STAT1); in genphy_c45_read_link()
530 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in genphy_c45_read_lpa()
655 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in genphy_c45_read_mdix()
1039 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in genphy_c45_pma_read_ext_abilities()
1367 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, in genphy_c45_plca_set_cfg()
[all …]
H A Dbcm87xx.c60 val = phy_read_mmd(phydev, devid, reg); in bcm87xx_of_reg_init()
106 rx_signal_detect = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in bcm87xx_read_status()
114 pcs_status = phy_read_mmd(phydev, MDIO_MMD_PCS, in bcm87xx_read_status()
122 xgxs_lane_status = phy_read_mmd(phydev, MDIO_MMD_PHYXS, in bcm87xx_read_status()
144 reg = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_CONTROL); in bcm87xx_config_intr()
150 err = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_STATUS); in bcm87xx_config_intr()
164 err = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_STATUS); in bcm87xx_config_intr()
H A Dbcm84881.c129 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in bcm84881_aneg_done()
133 bmsr = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_C22 + MII_BMSR); in bcm84881_aneg_done()
146 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); in bcm84881_read_status()
155 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in bcm84881_read_status()
159 bmsr = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_C22 + MII_BMSR); in bcm84881_read_status()
185 val = phy_read_mmd(phydev, MDIO_MMD_AN, in bcm84881_read_status()
209 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, 0x4011); in bcm84881_read_status()
H A Ddp83tg720.c145 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_LINK_QUAL_3); in dp83tg720_update_stats()
163 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_PKT_STAT_1); in dp83tg720_update_stats()
169 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_PKT_STAT_2); in dp83tg720_update_stats()
176 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_PKT_STAT_3); in dp83tg720_update_stats()
182 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_PKT_STAT_4); in dp83tg720_update_stats()
188 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_PKT_STAT_5); in dp83tg720_update_stats()
195 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_PKT_STAT_6); in dp83tg720_update_stats()
301 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_TDR_CFG); in dp83tg720_cable_test_get_status()
314 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, in dp83tg720_cable_test_get_status()
433 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_SQI_REG_1); in dp83tg720_get_sqi()
H A Dteranetics.c39 if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93)) in teranetics_aneg_done()
54 if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93)) { in teranetics_read_status()
55 reg = phy_read_mmd(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_LNSTAT); in teranetics_read_status()
62 reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in teranetics_read_status()
H A Ddp83td510.c332 val = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_LEDS_CFG_1); in dp83td510_led_hw_control_get()
418 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PKT_STAT_1); in dp83td510_update_stats()
424 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PKT_STAT_2); in dp83td510_update_stats()
431 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PKT_STAT_3); in dp83td510_update_stats()
437 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PKT_STAT_4); in dp83td510_update_stats()
443 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PKT_STAT_5); in dp83td510_update_stats()
450 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PKT_STAT_6); in dp83td510_update_stats()
555 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, in dp83td510_read_status()
733 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_TDR_CFG); in dp83td510_cable_test_get_tdr_status()
743 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, in dp83td510_cable_test_get_tdr_status()
[all …]
H A Dmarvell-88q2xxx.c281 ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_MMD_AN_MV_STAT); in mv88q2xxx_read_link_gbit()
293 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_read_link_gbit()
302 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_read_link_gbit()
328 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_read_link_100m()
338 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_read_link_100m()
536 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_get_sqi()
551 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, 0xfc88); in mv88q2xxx_get_sqi()
607 irq = phy_read_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_handle_interrupt()
700 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_hwmon_read()
709 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_hwmon_read()
[all …]
H A Dadin1100.c84 ret = phy_read_mmd(phydev, MDIO_MMD_AN, ADIN_AN_PHY_INST_STATUS); in adin_read_status()
148 int rc = phy_read_mmd(phydev, MDIO_MMD_VEND2, in adin_phy_ack_intr()
177 irq_status = phy_read_mmd(phydev, MDIO_MMD_VEND2, in adin_phy_handle_interrupt()
252 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10T1L_STAT); in adin_get_features()
286 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_STAT1); in adin_get_sqi()
292 ret = phy_read_mmd(phydev, MDIO_STAT1, ADIN_MSE_VAL); in adin_get_sqi()
H A Dmarvell10g.c195 return phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP); in mv3310_hwmon_read_temp_reg()
200 return phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_TEMP); in mv2110_hwmon_read_temp_reg()
356 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_DSC1); in mv3310_get_downshift()
417 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_CSCR1); in mv3310_get_edpd()
502 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_BOOT); in mv3310_probe()
518 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_FW_VER0); in mv3310_probe()
870 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in mv3310_get_features()
1024 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in mv3310_read_status_copper()
1028 cssr1 = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_CSSR1); in mv3310_read_status_copper()
1081 val = phy_read_mmd(phydev, MDIO_MMD_AN, MV_AN_STAT1000); in mv3310_read_status_copper()
[all …]
H A Ddp83tc811.c120 value = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol()
166 value = phy_read_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG); in dp83811_get_wol()
172 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_get_wol()
177 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_get_wol()
182 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_get_wol()
369 value = phy_read_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG); in dp83811_suspend()
H A Dnxp-c45-tja11xx.c394 ts->tv_nsec = phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in _nxp_c45_ptp_gettimex64()
396 ts->tv_nsec |= phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in _nxp_c45_ptp_gettimex64()
398 ts->tv_sec = phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in _nxp_c45_ptp_gettimex64()
400 ts->tv_sec |= phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in _nxp_c45_ptp_gettimex64()
539 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, in tja1120_extts_is_valid()
555 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, in tja1120_get_extts()
1625 phy_abilities = phy_read_mmd(phydev, MDIO_MMD_VEND1, in nxp_c45_tja1120_errata()
1746 phy_abilities = phy_read_mmd(phydev, MDIO_MMD_VEND1, in nxp_c45_probe()
1837 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, in tja1103_nmi_handler()
1952 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, in tja1120_nmi_handler()
[all …]
H A Dmicrochip_t1.c1517 val = phy_read_mmd(phydev, stat.mmd, stat.reg); in lan887x_get_stat()
1557 rc = phy_read_mmd(phydev, MDIO_MMD_VEND1, LAN887X_INT_STS); in lan887x_config_intr()
1752 rc = phy_read_mmd(phydev, MDIO_MMD_VEND1, in lan887x_cable_test_chk()
1799 gain_idx = phy_read_mmd(phydev, MDIO_MMD_VEND1, in lan887x_cable_test_report()
1806 pos_peak = phy_read_mmd(phydev, MDIO_MMD_VEND1, in lan887x_cable_test_report()
1813 neg_peak = phy_read_mmd(phydev, MDIO_MMD_VEND1, in lan887x_cable_test_report()
1820 pos_peak_time = phy_read_mmd(phydev, MDIO_MMD_VEND1, in lan887x_cable_test_report()
1827 neg_peak_time = phy_read_mmd(phydev, MDIO_MMD_VEND1, in lan887x_cable_test_report()
1880 gain_idx_hybrid = phy_read_mmd(phydev, MDIO_MMD_VEND1, in lan887x_cable_test_report()
1887 pos_peak_time_hybrid = phy_read_mmd(phydev, MDIO_MMD_VEND1, in lan887x_cable_test_report()
[all …]
H A Ddp83867.c216 val_rxcfg = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RXFCFG); in dp83867_set_wol()
284 value = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RXFCFG); in dp83867_get_wol()
296 sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR, in dp83867_get_wol()
301 sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR, in dp83867_get_wol()
306 sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR, in dp83867_get_wol()
517 const u16 val = phy_read_mmd(phydev, DP83867_DEVADDR, in dp83867_verify_rgmii_cfg()
700 delay = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIIDCTL); in dp83867_of_init()
781 bs = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_STRAP_STS2); in dp83867_config_init()
831 bs = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_STRAP_STS1); in dp83867_config_init()
846 val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL); in dp83867_config_init()
[all …]
H A Dmarvell-88x2222.c307 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1); in mv2222_aneg_done()
315 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_STAT); in mv2222_aneg_done()
328 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1); in mv2222_read_status_10g()
364 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_STAT); in mv2222_read_status_1g()
390 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_PHY_STAT); in mv2222_read_status_1g()
416 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_RX_SIGNAL_DETECT); in mv2222_link_is_operational()
H A Dadin.c282 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_RGMII_CFG_REG); in adin_config_rgmii_mode()
328 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_RMII_CFG_REG); in adin_config_rmii_mode()
441 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_FLD_EN_REG); in adin_get_fast_down()
789 rc = phy_read_mmd(phydev, MDIO_MMD_VEND1, in adin_soft_reset()
814 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, stat->reg1); in adin_read_mmd_stat_regs()
823 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, stat->reg2); in adin_read_mmd_stat_regs()
931 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, in adin_cable_test_report_pair()
942 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, in adin_cable_test_report_pair()
978 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_CDIAG_RUN); in adin_cable_test_get_status()
H A Ddp83869.c266 val_rxcfg = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG); in dp83869_set_wol()
362 value = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG); in dp83869_get_wol()
378 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR, in dp83869_get_wol()
388 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR, in dp83869_get_wol()
398 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR, in dp83869_get_wol()
527 val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1); in dp83869_set_strapped_mode()
580 ret = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1); in dp83869_of_init()
844 val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL); in dp83869_config_init()
H A Ddp83822.c230 value = phy_read_mmd(phydev, MDIO_MMD_VEND2, in dp83822_config_wol()
290 value = phy_read_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_WOL_CFG); in dp83822_get_wol()
296 sopass_val = phy_read_mmd(phydev, MDIO_MMD_VEND2, in dp83822_get_wol()
301 sopass_val = phy_read_mmd(phydev, MDIO_MMD_VEND2, in dp83822_get_wol()
306 sopass_val = phy_read_mmd(phydev, MDIO_MMD_VEND2, in dp83822_get_wol()
903 val = phy_read_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_SOR1); in dp83822_read_straps()
981 value = phy_read_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_WOL_CFG); in dp83822_suspend()
995 value = phy_read_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_WOL_CFG); in dp83822_resume()
1074 val = phy_read_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_MLEDCR); in dp83822_led_hw_control_get()
1080 val = phy_read_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_LEDCFG1); in dp83822_led_hw_control_get()
H A Dmicrochip_t1s.c134 return phy_read_mmd(phydev, MDIO_MMD_VEND2, LAN865X_REG_CFGPARAM_DATA); in lan865x_revb_indirect_read()
168 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, in lan865x_read_cfg_params()
284 err = phy_read_mmd(phydev, MDIO_MMD_VEND2, LAN867X_REG_STS2); in lan867x_check_reset_complete()
290 err = phy_read_mmd(phydev, MDIO_MMD_VEND2, LAN867X_REG_STS2); in lan867x_check_reset_complete()
H A Dmicrochip.c231 priv->chip_id = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_ID); in lan88xx_probe()
232 priv->chip_rev = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_REV); in lan88xx_probe()
290 val = phy_read_mmd(phydev, MDIO_MMD_PCS, in lan88xx_config_init()
H A Dmicrel.c1081 newval = phy_read_mmd(phydev, 2, reg); in ksz9031_of_load_skew_values()
1121 reg = phy_read_mmd(phydev, 0x1C, MII_KSZ9031RN_EDPD); in ksz9031_enable_edpd()
1323 newval = phy_read_mmd(phydev, 2, reg); in ksz9131_of_load_skew_values()
1393 reg = phy_read_mmd(phydev, 2, 0); in ksz9131_led_errata()
4296 phy_read_mmd(phydev, 2, LAN8841_PTP_TX_MSG_HEADER2); in lan8841_ptp_flush_fifo()
4298 phy_read_mmd(phydev, 2, LAN8841_PTP_INT_STS); in lan8841_ptp_flush_fifo()
4324 tmp = phy_read_mmd(phydev, 2, LAN8841_PTP_GPIO_CAP_STS); in lan8841_gpio_process_cap()
4369 status = phy_read_mmd(phydev, 2, LAN8841_PTP_INT_STS); in lan8841_handle_ptp_interrupt()
4740 s = phy_read_mmd(phydev, 2, LAN8841_PTP_LTC_RD_SEC_HI); in lan8841_ptp_gettime64()
4769 s = phy_read_mmd(phydev, 2, LAN8841_PTP_LTC_RD_SEC_HI); in lan8841_ptp_getseconds()
[all …]
/linux-6.15/drivers/net/phy/aquantia/
H A Daquantia_main.c133 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg); in aqr107_get_stat()
139 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg + 1); in aqr107_get_stat()
287 irq_status = phy_read_mmd(phydev, MDIO_MMD_AN, in aqr_handle_interrupt()
307 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_LP_STAT1); in aqr_read_status()
613 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, config_reg); in aqr107_read_rate()
691 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_VEND_PROV); in aqr107_get_downshift()
756 ret = read_poll_timeout(phy_read_mmd, val, val != 0, in aqr_wait_reset_complete()
774 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_FW_ID); in aqr107_chip_info()
889 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_LP_STAT1); in aqr107_link_change_notify()
897 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_LP_STAT4); in aqr107_link_change_notify()
[all …]
H A Daquantia_hwmon.c44 int temp = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); in aqr_hwmon_get()
70 int val = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); in aqr_hwmon_test_bit()
/linux-6.15/drivers/net/phy/realtek/
H A Drealtek_hwmon.c33 raw = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL822X_VND2_TSRR) & 0x3ff; in rtl822x_hwmon_read()
38 raw = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL822X_VND2_TSSR) >> 6; in rtl822x_hwmon_read()
/linux-6.15/drivers/net/phy/qcom/
H A Dqca807x.c265 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in qca807x_led_hw_control_get()
284 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in qca807x_led_hw_control_get()
375 val = phy_read_mmd(priv->phy, MDIO_MMD_AN, reg); in qca807x_gpio_get()
388 val = phy_read_mmd(priv->phy, MDIO_MMD_AN, reg); in qca807x_gpio_set()
770 control_dac = phy_read_mmd(phydev, MDIO_MMD_AN, in qca807x_config_init()
H A Dqcom-phy-lib.c536 val = phy_read_mmd(phydev, MDIO_MMD_PCS, cdt_length_reg); in qca808x_cdt_fault_length()
598 val = phy_read_mmd(phydev, MDIO_MMD_PCS, QCA808X_MMD3_CDT_STATUS); in qca808x_cable_test_get_status()
635 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in qca808x_led_reg_hw_control_status()

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